A contact-free floating-gate non-volatile memory cell array and process with silicided NSAG bitlines and with source/drain regions buried beneath relatively thick silicon oxide. The bitlines have a relatively small resistance, eliminating the need for parallel metallic conductors with numerous bitline...http://www.google.com/patents/US5023680?utm_source=gb-gplus-sharePatent US5023680 - Floating-gate memory array with silicided buried bitlines and with single-step-defined floating gates
