A method includes a first step of forming a first exposed area including only a device region on a semiconductor wafer that is repeated as needed. Next, a second step of forming a second exposed area including a portion of the device region and a Test Element Group (TEG) region on the semiconductor wafer...http://www.google.com/patents/US6492189?utm_source=gb-gplus-sharePatent US6492189 - Method of arranging exposed areas including a limited number of test element group (TEG) regions on a semiconductor wafer
