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US005128732A
United States Patent [19] [11] Patent Number: 5,128,732
Sugahara et al. [45] Date of Patent: Jul. 7, 1992
[54] STACKED SEMICONDUCTOR DEVICE
[75] Inventors: Kazuyuki Sugahara; Tadashi
Nishimura; Shigeru Kusunoki; Yasuo
Inoue; Yasuo Yamaguchi, all of
Hyogo, Japan
[73] Assignee: Kozo Iizuka, Director General,
Agency of Industrial Science &
Technology, Tokyo, Japan
[21] Appl. No.: 199,439
[22] Filed: May 27, 1988
[30] Foreign Application Priority Data
May 30, 1987 [JP] Japan 62-133514
Dec. 24, 1987 [JP] Japan 62-325524
[51] Int. CI.5 H01L 27/02
[52] U.S. CI 357/23.7
[58] Field of Search 357/23.7, 4, 49
[56] References Cited
U.S. PATENT DOCUMENTS
4,472,729 9/1984 Shibata et al 357/4
4,489,478 12/1984 Sakurai 357/23.7
A stacked semiconductor device has three-dimensional alternate layers of semiconductor elements and insulating layers each electrically insulating the adjacent upper and lower layers of semiconductor elements, formed on a single crystal semiconductor substrate. A semiconductor is deposited in openings formed respectively in the insulating layers to form single crystal semiconductor layers each having the same crystal axis as the single crystal semiconductor substrate respectively over the insulating layers, and semiconductor elements are formed respectively in a plurality of layers. The opening formed through the upper insulating layer reaches the lower layer of the semiconductor element immediately below the same upper insulating layer, and is formed at a position spaced apart horizontally from the opening formed through the lower insulating layer immediately below the same upper insulating layer. A semiconductor for forming the upper layer of a semiconductor having the same crystal axis as the lower layer of a semiconductor is deposited in the opening of the upper insulating layer so that satisfactory lateral epitaxial growth will occur over the insulating layer.
Primary Examiner—William D. Larkins
Attorney, Agent, or Firm—Rothwell, Figg, Ernst & Kurz
