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(12) United States Patent

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(io) Patent No.: (45) Date of Patent:

US 7,135,928 B2 *Nov. 14, 2006

(54) METHOD FOR TRANSCONDUCTANCE LINEARIZATION FOR DC-COUPLED APPLICATIONS

(75) Inventor: Arya Reza Behzad, Poway, CA (US)

(73) Assignee: Broadcom Corporation, Irvine, CA (US)

( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.

This patent is subject to a terminal disclaimer.

(21) Appl. No.: 10/769,178

(22) Filed: Jan. 30, 2004

(65) Prior Publication Data

US 2004/0183598 Al Sep. 23, 2004

Related U.S. Application Data

(60) Provisional application No. 60/443,594, filed on Jan. 30, 2003.

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A Class AB voltage-to-current converter includes a plurality of DC coupled transconductance stages that produce a linearized output and a biasing circuit. The biasing circuit generates a primary bias voltage that is greater than a generated secondary bias voltage. As such, the first transconductance stage becomes active before the second transconductance stage with respect to the magnitude of a differential input voltage, thereby allowing the transconductance of the secondary transconductance stage to be added (or subtracted) from the transconductance of the primary stage to improve the overall transconductance of the Class AB voltage-to-current converter. As each of the plurality of transconductance stages is biased differently from the others, the various transconductance stages are biased on to differing amounts based upon the biasing signals as well as the input signal.

14 Claims, 9 Drawing Sheets

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