DYNAMIC RANDOM ACCESS MEMORY
WITH A NORMAL PRECHARGE MODE AND
A PRIORITY PRECHARGE MODE
 Inventor: G. R. Mohan Rao, Dallas, Tex.
 Assignee: Cirrus Logic, Inc., Fremont, Calil.
 Appl. No.: 09/088,535  Filed: Jun. 1, 1998
Related U.S. Application Data
 Division of application No. 08/641,887, May 2, 1996.
 Int. CI.6 G06F 12/00; G11C 7/00
 U.S. CI 711/105; 711/158; 711/169;
 Field of Search 711/105, 169,
711/158; 365/193, 203
 References Cited
U.S. PATENT DOCUMENTS
5,555,526 9/1996 Kim 365/233
A dynamic random access memory (DRAM) includes priority access control circuitry, where the DRAM has a first precharge mode and a priority precharge mode. In the first precharge mode, the array is precharged during an external row address strobe (RAS) and accessed during an active state ol the external RAS. In the priority precharge mode, the array is precharged during a precharge state ol an internal RAS initiated by a priority signal received during any one ol the precharge and active states ol the external RAS, where the priority access control circuitry returns to the first mode on a subsequent precharge state ol the external RAS.
7 Claims, 7 Drawing Sheets