METHOD AND APPARATUS FOR
SELECTING OPTIMUM LEVELS FOR IN-
SYSTEM PROGRAMMABLE CHARGE
 Inventors: Sunae Kang, Los Gatos; Rafael G.
San Luis, Jr., San Jose; Derek R.
Curd, Fremont; Ronald J. Mack,
Gilroy, all of Calif.
 Assignee: Xilinx, Inc., San Jose, Calif.
 Appl. No.: 99,160
 Filed: Jun. 18, 1998
 Int. CI. G11C 16/04
 U.S. CI 365/185.18; 365/185.22;
365/185.29; 365/185.33; 365/218
 Field of Search 365/185.18, 185.22,
365/185.23, 185.29, 185.33, 218, 226; 326/38
 References Cited
U.S. PATENT DOCUMENTS
4,638,464 1/1987 Cranford, Jr. et al 365/226
5,537,362 7/1996 Gill et al 365/189.11
5,661,685 8/1997 Lee et al 365/185.22
5,734,868 3/1998 Curd et al 326/38
5,764,076 6/1998 Lee et al 326/28
5,790,469 8/1998 Wong 365/226
Primary Examiner—David Nelms
Assistant Examiner—Trong Phan
Attorney, Agent, or Firm—Lois D. Cartier; Adam H.
Tachner, Esq.; Crosby, Heafey, Roach & May
A novel test procedure is used to determine the optimum programmable charge pump levels for a flash memory array in a CPLD. According to the method of the invention, an automated tester steps through all combinations of charge pump codes and attempts to program the flash memory with each combination of voltage levels. For each combination, the results of the test (pass or fail) are logged and stored into a map or array. The center of a window of passing pump codes is taken as the starting reference point. The next step is to verify the actual voltage level associated with the pump code combination corresponding to the starting reference point. The reference pump code is loaded into the device and the corresponding flash memory cell voltage levels are measured. If the measured voltage level does not fall into the preferred range, the tester automatically adjusts the level towards the preferred range by adjusting the pump codes.
23 Claims, 5 Drawing Sheets