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US006822694B2
(12) United States Patent (io) Patent No.: US 6,822,694 B2
Miyazaki et al. (45) Date of Patent: Nov. 23,2004
Fig. 2
(54) SIGNAL PROCESSING APPARATUS
(75) Inventors: Shinichiro Miyazaki, Kanagawa (JP);
Hiroyuki Kqjima, Kanagawa (JP);
Akira Shirahama, Kanagawa (JP);
Hiroshi Sugaya, Tokyo (JP)
(73) Assignee: Sony Corporation, Tokyo (JP)
( * ) Notice: Subject to any disclaimer, the term ol this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 09/203,923
(22) Filed: Dec. 2, 1998
(65) Prior Publication Data
US 2002/0105594 Al Aug. 8, 2002 (30) Foreign Application Priority Data
Dec. 4, 1997 (JP) 9-333999
(51) Int. CI.7 H04N 9/68; H04N 9/67;
H04N 9/74; H04N 9/76
(52) U.S. CI 348/584; 348/590; 348/598;
348/599; 348/646; 348/660
(58) Field of Search 348/584, 588,
348/589, 590, 598, 599, 600, 645, 646, 659, 660, 661; H04N 9/74, 9/76, 9/68,
9/67
(56) References Cited
U.S. PATENT DOCUMENTS
5,159,453 A * 10/1992 Dhein et al 358/142
5,534,942 A 7/1996 Beyers, Jr. et al.
5,550,597 A * 8/1996 Wada et al 348/708
5,568,204 A * 10/1996 Takamori 348/584
5,712,687 A * 1/1998 Naveen et al 348/453
5,745,186 A * 4/1998 Shimizu et al 348/562
5,969,767 A * 10/1999 Ishikawa et al 348/564
5,982,455 A * 11/1999 Steele et al 348/631
6,061,099 A * 5/2000 Hostetler 348/584
6,188,730 Bl * 2/2001 Ngai et al 375/240.21
6,307,592 Bl * 10/2001 Go 348/450
FOREIGN PATENT DOCUMENTS
EP 0862334 A2 * 2/1998
EP 0921693 * 6/1999
* cited by examiner
Primary Examiner—Brian P. Yenke
(74) Attorney, Agent, or Firm—Frommer Lawrence & Haug LLP; William S. Frommer
(57) ABSTRACT
According to the signal processing apparatus ol the present invention, in a text signal processing circuit, predetermined signal processes are executed to a luminance signal Y and color difference signals U and V in which a ratio ol sampling clocks is equal to (4:4:4) and resultant signals are supplied to a mixing circuit. In a video signal processing circuit, predetermined signal processes are executed to the signals Y, U, and V in which a ratio ol sampling clocks is equal to (4:1:1) or (4:2:2). The signal Y is supplied to the mixing circuit through a delay adjusting circuit and the high frequency components are removed from the signals U and V by a band limiting filter and, alter that, the resultant signals are supplied to the mixing circuit. The signal mixed by the mixing circuit is supplied to a LPF through a D/A converter. In the LPF, the signal is demodulated by the band limiting filter according to (4:4:4).
5 Claims, 6 Drawing Sheets