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United States Patent
Sun et al.
[ii] Patent Number: 4,994,410  Date of Patent: Feb. 19, 1991
 METHOD FOR DEVICE METALLIZATION BY FORMING A CONTACT PLUG AND INTERCONNECT USING A SILICIDE/NLTRIDE PROCESS
 Inventors: Shih W. Sun; Jen-Jiang Lee, both of Austin, Tex.
 Assignee: Motorola, Inc., Schaumburg, 111.
 Appl. No.: 481,137
 Filed: Feb. 16,1990
Related U.S. Application Data
 Division of Set. No. 177,747, Apr. 4, 1988, Pat. No. 4,926,237.
 Int. a.5 H01L 21/44
 U.S. CL 437/192; 437/200;
148/DIG. 35; 357/67; 357/71
 Field of Search 437/192, 200;
 References Cited
U.S. PATENT DOCUMENTS 4,624,864 11/1986 Hartmann 437/192
4,784,973 11/1988 Stevens et al 437/200
4,829,024 5/1989 Klein et al 437/192
4,884,123 11/1989 Dixit et al 437/192
FOREIGN PATENT DOCUMENTS
0279588 2/1987 European Pat. Off. 437/190
1142739 6/1986 Japan 437/192
61-183942 8/1986 Japan 437/200
Primary Examiner—Brian E. Hearn
Assistant Examiner—Laura M. Holtzman
Attorney, Agent, or Firm—Jasper W. Dockrey; John A.
A semiconductor device, device metallization, and method are described. The device metallization, which is especially designed for submicron contact openings, includes titanium silicide to provide a low resistance contact to a device region, titanium nitride and sputtered tungsten to provide a diffusion barrier, etched back chemical vapor deposited tungsten for planarization, and aluminum or an aluminum alloy for interconnection.
4 Claims, 2 Drawing Sheets
U.S. Patent Feb. 19,1991 sheet 2 of 2 4,994,410
This invention relates generally to device metallization, its use in a semiconductor device, and to a method for its fabrication, and more specifically to a multilayered device metallization suitable for use in small geometry semiconductor devices and to methods for its fabri- 15 cation.
The semiconductor industry is characterized by a trend toward fabricating larger and more complex functions on a given semiconductor chip. The larger and more complex functions are achieved by reducing de- 20 vice sizes and spacing and by reducing the junction depth of regions formed in the semiconductor substrate. Among the feature sizes which are reduced in size are the width and spacing of interconnecting metal lines and the contact openings through which the metalliza- 25 tion makes electrical contact to device regions. As the feature sizes are reduced, new problems arise which must be solved in order to economically and reliably produce the semiconductor devices.
As both the contact size and junction depth are re- 30 duced, a new device metallization process is required to overcome the problems which are encountered. Historically, device interconnections have been made with aluminum or aluminum alloy metallization. Aluminum, however, presents problems with junction spiking 35 which result from dissolution of silicon in the aluminum metallization and aluminum in the silicon. This problem is exacerbated with the small device sizes because the shallow junction is easily shorted and because the amount of silicon available to satisfy the solubility re- 40 quirements of the aluminum metallization is only accessed through the small contact area, increasing the resultant depth of the spike. Adding silicon to the aluminum metallization has helped to solve this problem, but has, in turn, resulted in silicon precipitation and other 45 problems.
A variety of solutions have been attempted to overcome the problems inherent with aluminum metallization. For example, the device region exposed through a contact opening has been metallized with chemical 50 vapor deposited (cvd) tungsten. The tungsten is deposited by the reduction of WF6 with hydrogen. The WF6, however, initially reacts with the silicon surface, employing silicon from the contact area in the reaction. This results in what has become known in the literature 55 as "worm holes" or tunnels in the silicon which can also cause shorting of the underlying junction. The use of sputtered instead of cvd tungsten would overcome the problem of reaction with the silicon, but sputtered tungsten is unable to reduce any native oxide Film which 60 may be present on the surface of the device region. The remaining oxide film results in high contact resistance. A further attempt at solving this problem has employed the use of a reactive silicide to make the initial contact to the device region. The silicide is then contacted with 65 aluminum. The silicide makes a low resistance contact to the silicon, but the silicide-aluminum contact has the same problem as does the use of aluminum directly on
the silicon. Silicon from the silicide and from the underlying junction dissolves in the aluminum, resulting in aluminum spikes through the underlying junction.
Another problem which is exacerbated by the shrinking device sizes is that of unreliable step coverage by the device metallization as it traverses steps in the device topography and especially as the metallization traverses into the contact openings. It is therefore especially beneficial if the contact metallization provides a relatively planar surface to which the interconnect metallization can be applied.
It is therefore an object of this invention to provide an improved device metallization.
It is a further object of this invention to provide an improved semiconductor device structure.
It is yet another object of this invention to provide an improved process for fabricating semiconductor devices.
BRIEF SUMMARY OF THE INVENTION
The foregoing and other objects and advantages of the invention are achieved through the application and use of an improved multilayer device metallization. In accordance with one embodiment of the invention, a semiconductor device is fabricated by providing a silicon substrate in which device regions are formed at the surface. Contact openings are formed in an insulating layer which overlies the substrate surface to expose portions of the device regions. Layers of titanium and tungsten are sputtered onto the device surface and extend into the contact opening. Annealing these layers in nitrogen causes the formation of titanium silicide at the interface between the titanium and silicon and causes the formation of titanium nitride at the interface between the titanium and tungsten. The titanium nitride and the sputtered tungsten form a diffusion barrier which is impervious to the diffusion of silicon. A layer of chemical vapor deposited tungsten is then formed over the sputtered tungsten to substantially fill the contact opening. The chemical vapor deposited tungsten is etched back to form a substantially planar plug structure using the titanium nitride layer as an etch stop indicator. Aluminum is then applied and patterned to contact the tungsten plugs which fill the contact openings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1-5 illustrate, in cross-section, process steps for providing device metallization and for fabricating semiconductor devices in accordance with the invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The ideal device metallization provides a low resistance contact to a semiconductor device region, provides reliable interconnections, is easily patterned, and does not adversely react with the semiconductor substrate. A number of different materials, taken singly, provide one or more of the desirable qualities, but no single material meets all of the requirements. In accordance with the invention, a process is disclosed which provides all of the requirements for device metallization by using a multilayer structure. Process steps in accordance with the invention are illustrated in FIGS. 1-5.
FIG. 1 illustrates schematically, in cross-section, a portion of a semiconductor device 10 at an initial stage in production. Device 10 includes a semiconductor