METHOD FOR PLACEMENT OF
CONNECTORS USED INTERCONNECTING
CIRCUIT COMPONENTS IN AN
 Inventor: Dale M. Wong, San Francisco, Calif.
 Assignee: VLSI Technology, Inc., San Jose, Calif.
 Appl. No.: 626,819
 Filed: Dec. 13,1990
 Int. CI.' G06F 15/20
 U.S. CI 364/490; 364/488
 Field of Search 364/488, 489, 490, 491
 References Cited
U.S. PATENT DOCUMENTS
4,615,011 9/1986 Linsker 364/491
4,630,219 12/1986 DiGiacomo et al 364/488
4,777,606 10/1988 Fournier 364/491
4.852,016 7/1989 McGehee 364/491
4,910,680 3/1990 Hiwatashi 364/491
5,019,997 5/1991 Haller 364/491 X
5,072,402 12/1991 Ashtaputre et al 364/488 X
5,079,717 1/1992 Miwa 364/488 X
5,151,868 9/1992 Nishiyama et al 364/490
Sara Baase, "Computer Algorithms, Introduction to Design and Analysis", Addison-Wesley Publishing Company, Reading Massachusetts, 1978, pp. 127-136. Charles Ng, et al. A Hierarchical Floor-Planning, Placement, and Routing Tool for Sea-of-Gates Designs, IEEE
Inter-area connectors are optimally placed on peripheries of bounded areas within an integrated circuit. Once circuit components' are placed upon the integrated circuit, global optimum paths for connector lines between signal connectors within all the circuit components are calculated. This may be performed by calculating a global optimum rectilinear spanning tree for each net of signal connectors. Once the global optimum paths are calculated, inter-area connectors are placed at each location on a periphery of any of the circuit components where a global optimum path crosses the periphery. Finally, connector lines may be placed along the global optimum paths. For signal connectors and inter-area connectors within each circuit component, internal connector lines are routed between signal connectors along the global optimum paths within the circuit component. Also, between the circuit components, interarea connector lines are routed between inter-area connectors along the global optimum paths.
8 Claims, 5 Drawing Sheets