United States Patent  [ii] Patent Number: 4,493,058
Adam  Date of Patent: Jan. 8, 1985
 INTEGRATED CIRCUIT FOR WRITING, READING AND ERASING MEMORY MATRICES WITH INSULATED-GATE FIELD-EFFECT TRANSISTORS HAVING NON-VOLATILE STORAGE BEHAVIOUR
 Inventor: Fritz G. Adam, Freiburg, Fed. Rep. of Germany
 Assignee: ITT Industries, Inc., New York, N.Y.
 Appl. No.: 359,536
 Filed: Mar. 18, 1982
 Foreign Application Priority Data
Apr. 1, 1981 [EP] European Pat. Off. 81102460.3
 Int. CV G11C 11/40
 U.S. CI 365/189; 365/182
 Field of Search 365/189, 182, 185, 218
 References Cited
U.S. PATENT DOCUMENTS
4,228,527 10/1980 Gerber et al 365/185
4,330,850 5/1982 Jacobs et al. .
Primary Examiner—Joseph A. Popek
Attorney, Agent, or Firm—Donald J. Lenkszus
A memory access and control circuit is described for use with a non-volatile memory matrix utilizing insulated gate field effect transistors. Two one out of n selector circuits which are complementary in operation and which are formed from transistors of opposite conductivity type are formed on an integrated circuit and transistors of one conductivity type are formed in insulating islands in the substrate.
10 Claims, 20 Drawing Figures