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United States Patent

[19]

Hochschild et al.

US005805589A [ii] Patent Number: [45] Date of Patent:

5,805,589 *Sep. 8, 1998

[54] CENTRAL SHARED QUEUE BASED TIME MULTIPLEXED PACKET SWITCH WITH DEADLOCK AVOIDANCE

[75] Inventors: Peter Heiner Hochschild, New York;

Monty Montague Denneau, Brewster, both of N.Y.

[73] Assignee: International Business Machines Corporation, Armonk, N.Y.

[ * ] Notice: The term of this patent shall not extend beyond the expiration date of Pat. No. 5,546,391.

[21] Appl. No.: 608,017
[22] Filed: Mar. 4, 1996

Related U.S. Application Data

[63] Continuation of Ser. No. 424,824, Apr. 19, 1995, Pat. No. 5,546,391, which is a continuation of Ser. No. 27,906, Mar. 4, 1993, abandoned.

[51] Int. C I. H04L 12/28

[52] U.S. CI 370/389; 370/412; 370/413;

370/428

[58] Field of Search 370/389, 395,

370/412, 413, 414, 415, 416, 417, 418, 422, 428, 444, 449, 455; 340/825.51

[56] References Cited

U.S. PATENT DOCUMENTS

5,050,161 9/1991 Golestani 370/230

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Specifically, a central queue based packet switch, illustratively an eight-way router, that advantageously avoids deadlock and an accompanying method for use therein. Specifically, each packet switch (25j) contains input port circuits (310) and output port circuits (380) inter-connected through two parallel paths: a multi-slot central queue (350) and a low latency by-pass; the latter cross-point switching matrix (360). The central queue has one slot dedicated to each output port to store a message portion ("chunk") destined for only that output port with the remaining slots being shared for all the output ports and dynamically allocated thereamong, as the need arises. Only those chunks which are contending for the same output port are stored in the central queue; otherwise, these chunks are routed to the appropriate output ports through the cross-point switching matrix.

20 Claims, 12 Drawing Sheets

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