(54) CONTROLLER FOR A VARIABLE LENGTH DECODER
(75) Inventor: Michael Bakhmutsky, Spring Valley, NY (US)
(73) Assignee: Philips Electronics North America Corporation, New York, NY (US)
( * ) Notice: This patent issued on a continued prosecution application filed under 37 CFR 1.53(d), and is subject to the twenty year patent term provisions ol 35 U.S.C. 154(a)(2).
Subject to any disclaimer, the term ol this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 08/957,820
(22) Filed: Oct. 27, 1997
(51) Int. CI. H03M 7 40
(52) U.S. CI 341/67; 341/50
(58) Field of Search 341/50, 67, 65,
(56) References Cited
U.S. PATENT DOCUMENTS
4,075,622 * 2/1978 Lawrence et al 341/67
5,173,695 12/1992 Sun et al 341/67
5,455,578 10/1995 Bhandari 341/51
5,491,480 * 2/1996 Jan et al 341/67
5,650,905 7/1997 Bakhmutsky 341/67
5,657,016 8/1997 Bakhmutsky 341/67
5,686,916 * 11/1997 Bakhmutsky 341/67
5,687,114 * 11/1997 Khan 365/185.03
A controller lor controlling the operation ol a variable length decoder, which includes a coding protocol determination circuit for determining a coding protocol used in coding a digital data stream currently being decoded by the variable length decoder, and a configuration control circuit for automatically reconfiguring the variable length decoder into a selected one ol a plurality ol different possible decoding configurations, depending upon the determined coding protocol. Also disclosed is a controller for controlling the operation ol a variable length decoder, which includes a code type determination circuit which determines a code type ol a current code word currently being decoded by the variable length decoder, and a mode switching circuit which switches a mode ol operation ol the controller between a parallel decoding mode ol operation and a tree-searching mode ol operation, depending upon the determined code type ol the current code word. Also disclosed is a code word value memory which can be used by a variable length decoder for decoding the values ol the code words in the input digital data stream. The code word value memory is logically organized into a plurality ol individually addressable pages, at least one ol which is addressed by a first code prefix and includes individual code word values addressed by the first code prefix plus a sub-tree associated with at least one other code prefix, to thereby maximize memory utilization and minimize the required memory size.
11 Claims, 34 Drawing Sheets