(54) SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER DIE-DOWN FLIP CHIP BALL GRID ARRAY PACKAGE AND HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
(75) Inventor: Marcos Karnezos, Palo Alto, CA (US)
(73) Assignee: Chippac, Inc., Fremont, CA (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 21 days.
(21) Appl.No.: 11/374,472
(22) Filed: Mar. 13, 2006
(65) Prior Publication Data
US 2006/0170091 Al Aug. 3, 2006
Related U.S. Application Data
(62) Division of application No. 10/632,553, filed on Aug. 2, 2003, now Pat. No. 7,053,476.
(60) Provisional application No. 60/411,590, filed on Sep. 17, 2002.
A semiconductor multi-package module having stacked second and first packages, each package including a die attached to a substrate, in which the first and secondpackage substrates are interconnected by wire bonding, and in which the first package is a flip chip ball grid array package in a die-down configuration. Also, a method for making a semiconductor multi-package module, by providing a first package including a first package substrate and having a die-down flip chip configuration, affixing a second package including a second package substrate an upper surface of the first package, and forming z-interconnects between the first and second package substrates.
19 Claims, 7 Drawing Sheets