United States Patent  [ii] Patent Number: 4,538,239
Magar  Date of Patent: Aug. 27, 1985
 HIGH-SPEED MULTIPLIER FOR
MICROCOMPUTER USED IN DIGITAL
SIGNAL PROCESSING SYSTEM
 Inventor: Surendar S. Magar, Houston, Tex.
 Assignee: Texas Instruments Incorporated, Dallas, Tex.
 Appl. No.: 347,859
 Filed: Feb. 11, 1982
 Int. CV G06F7/52
 U.S. CI 364/759; 364/754
 Field of Search 364/760, 759, 757, 754,
364/716, 758, 606, 703, 841
 References Cited
U.S. PATENT DOCUMENTS
3,691,359 9/1972 Dell et al 364/760
3,795,880 3/1974 Singh et al 364/758
4,153,938 5/1979 Ghest et al 364/760
4,168,530 9/1979 Gajski et al 364/760
Frank S. Lee et al., "A High-Speed LSI GaAs 8 X 8 Bit
Parallel Multiplier", IEEE Journal of Solid State Cir-
cuits, vol. SC-17, No. 4, Aug. '82.
Shlomo Waser, "High-Speed Monolithic Multipliers
A system for real-time digital signal processing employs a single-chip mircocomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. An improved multiplier circuit produces a single state 16 X16 multiply function separate from the ALU, with 32-bit output to the ALU; an array of static adders with carry feed-forward controlled by two-bit-at-a-time Booth's decoders, along with a dynamic carry-ripple adder, produces the one-state 16x16 multiply. One input to the ALU passes thorugh 0-to-15 bit shifter with sign extension.
6 Claims, 53 Drawing Figures