Multi-scale programmable array

(54) MULTI-SCALE PROGRAMMABLE ARRAY

(75) Inventor: Charle' R. Rupp, Morgan Hill, CA (US)

(73) Assignee: Stretch, Inc., Mountain View, CA (US)

( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.

(21) Appl. No.: 09/475,400

(22) Filed: Dec. 30, 1999

(51) Int. CI.7 H03K 19/177

(52) U.S. CI 326/40; 326/46

(58) Field of Search 326/37-41, 46,

326/47, 49, 44

(56) References Cited

U.S. PATENT DOCUMENTS

5,258,668 A 11/1993 Cliff et al 326/41

5.260.610 A 11/1993 Pedersen et al 326/41

5.260.611 A 11/1993 Cliff et al 326/39

5,274,581 A 12/1993 Cliff et al 364/784

5,343,406 A * 8/1994 Freeman et al 716/16

5,357,152 A 10/1994 Jennings, III

5.414.377 A * 5/1995 Freidin 326/41

5.426.378 A * 6/1995 Ong 326/39

5,436,574 A 7/1995 Veenstra

5,726,584 A * 3/1998 Freidin 326/38

5,742,180 A 4/1998 DeHon et al.

5,920,202 A 7/1999 Young et al 326/39

5,926,036 A 7/1999 Cliff et al 326/40

5,963,050 A 10/1999 Young et al 326/41

5,977,793 A 11/1999 Reddy et al 326/41

5,982,195 A 11/1999 Cliff et al 326/41

5,986,465 A 11/1999 Mendel 326/39

FOREIGN PATENT DOCUMENTS

EP 0 507 507 10/1992

A novel architecture for a multi-scale programmable logic array (MSA) to be used in the design of complex digital systems allows digital logic to be programmed using both small-scale blocks (also called gate level blocks) as well as medium scale blocks (also called Register Transfer Level or RTL blocks). The MSA concept is based on a bit sliceable Arithmetic Logic Unit (ALU). Each bit-slice may be programmed to perform a basic Boolean logic operation or may be programmed to contribute to higher-level functions that are further programmed by an ALU controller circuit. The ALU controller level in this new approach also allows the primitive logic operations computed at the bit-slice level to be combined to perform complex random logic operations. The data shifting capability of this new programmable logic architecture reduces the complexity of the programmable routing needed to implement shift operations including multiplier arrays. The new array also allows logic variables under program control to dynamically modify the microprogram of each ALU. This technique is called configuration overlay and simplifies the programming of complex arithmetic and random logic functions.

15 Claims, 13 Drawing Sheets