METHOD OF MAKING TFT WITH ANODIC OXIDATION PROCESS USING POSITIVE AND NEGATIVE VOLTAGES
 Inventors: Shunpei Yamazaki, Tokyo; Hongyong Zhang, Kanagawa; Hideki Uochi, Kanagawa; Hiroki Adachi, Kanagawa; Yasuhiko Takemura, Kanagawa, all of Japan
 Assignee: Semiconductor Energy Laboratory Co., Ltd., Atsugi, Japan
 Appl. No.: 43,782
 Filed: Apr. 6,1993
Related U.S. Application Data
 Continuation-in-part of Ser. No. 933,810, Aug. 24, 1992, Pat. No. 5,308,998.
 Foreign Application Priority Data
Apr. 7, 1992 [JP] Japan 4-115503
Mar. 24, 1993 [JP] Japan 5-089117
 Int. CI.6 H01L 21/84
 U.S. CI 437/21; 437/41; 437/174;
437/170; 437/172; 205/91; 205/106; 205/324
 Field of Search 205/81, 106, 107,
205/324; 437/21, 71, 41, 101, 909, 245,
An improved method for manufacturing an insulated gate field effect transistor is described. The method comprises the steps of forming a semiconductor film on an insulating substrate, forming a gate insulating film on said semiconductor film, forming a gate electrode on said gate insulating film with said gate insulating film inbetween, anoding said gate electrode in order to coat an external surface of said gate electrode with an oxide film thereof and applying a negative or positive voltage to said gate electrode with respect to said semiconductor film. Lattice defects and interfacial states caused by the application of a positive voltage during the anoding are effectively eliminated by the negative voltage application.