Method of secondary to secondary data transfer with mirroring

(54) METHOD OF SECONDARY TO SECONDARY DATA TRANSFER WITH MIRRORING

(75) Inventors: Dennis E. Gates, Wichita, KS (US);

Scott E. Greenfield, Wichita, KS (US)

(73) Assignee: LSI Logic Corporation, Milpitas, CA (US)

( * ) Notice: This patent issued on a continued prosecution application filed under 37 CFR 1.53(d), and is subject to the twenty year patent term provisions ol 35 U.S.C. 154(a)(2).

Subject to any disclaimer, the term ol this patent is extended or adjusted under 35 U.S.C. 154(b) by 816 days.

(21) Appl. No.: 08/772,443

(22) Filed: Dec. 23, 1996

(51) Int. CI.7 G06F 12/00; G06F 13/12

(52) U.S. CI 711/114; 711/118; 711/154;

710/22; 710/39; 710/17

(58) Field of Search 711/100, 101,

711/111-114, 146, 1, 6, 118, 154; 714/1, 2, 3, 4, 5, 517; 345/509; 712/39, 17, 22

5,353,415 A 10/1994 Wolford et al 395/325

5,454,085 A 9/1995 Gajjar et al 710/105

5,469,548 A 11/1995 Callison et al 711/114

5,488,709 A 1/1996 Chan 711/118

5,524,268 A * 6/1996 Geldman et al.

5,548,788 A 8/1996 McGillis et al 395/851

5,566,331 A 10/1996 Irwin, Jr. et al 707/10

5,590,361 A * 12/1996 Iwamura et al 395/800.32

5,748,937 A * 5/1998 Abramson et al 395/394

5,784,571 A * 7/1998 Mantopoulos et al. . 395/200.77

5,822,553 A * 10/1998 Gifford et al 710/305

FOREIGN PATENT DOCUMENTS

WO WO 92/19058 * 10/1992 H04L/12/46

WO WO 98/28679 * 7/1998 G06F/13/12

* cited by examiner

Primary Examiner—Pierre-Michel Bataille

(74) Attorney, Agent, or Firm—Carstens, Yee &

Cahoon,LLP

(57) ABSTRACT

Data translers from the peripheral interlace ol a disk array to a data buffer are snooped to determine il the starting address ol a data transler matches an entry in a list ol starting addresses lor requested data. II a match is identified, third party transler is initiated and the data is simultaneously translerred to the host interlace ol the host system. The resulting data bandwidth is increased. A throttling/ suspension mechanism can temporarily or indefinitely hold up actual data movement into the data buffer to allow for temporary buffering and interlace speed matching as data is translerred to the host interlace.

36 Claims, 6 Drawing Sheets