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(12) United States Patent ao) Patent No.: us 6,445,628 Bi
Pereira et al. (45) Date of Patent: *Sep. 3,2002
(54) ROW REDUNDANCY IN A CONTENT ADDRESSABLE MEMORY
(75) Inventors: Jose Pio Pereira, Santa Clara;
Varadarajan Srinivasan, Los Altos
Hills; Bindiganavale S. Nataraj,
Cupertino; Sandeep Khanna, Santa
Clara, all of CA (US)
(73) Assignee: NetLogic Microsystems, Inc.,
Mountain View, CA (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
This patent is subject to a terminal disclaimer.
(21) Appl. No.: 09/886,235
(22) Filed: Jun. 18, 2001
Related U.S. Application Data
(63) Continuation of application No. 09/590,779, filed on Jun. 8, 2000, now Pat. No. 6,249,467, which is a continuation-inpart of application No. 09/420,516, filed on Oct. 18, 1999, now Pat. No. 6,275,426.
(51) Int. C I. G11C 7/00
(52) U.S. CI 365/200; 365/49; 365/230.03
(58) Field of Search 365/200, 49, 230.03,
(56) References Cited
U.S. PATENT DOCUMENTS
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5,319,589 A 6/1994 Yamagata et al 365/49
5,644,699 A 7/1997 Yoshida 395/182.05
U.S. Provisional Application No. 60/153,388 filed on Sep. 10, 1999 by Gibson et al.
U.S. Provisional Application No. 60/166,964 filed on Nov. 23, 1999 by Farhad Shafai.
Manu, Wada, Ieda, and Tanimoto, "A Redundancy Circuit for a Fault-Tolerant 256k MOS RAM," IEEE Journal of Solid-State Circuits, vol. SC-17, No. 4, Aug. 1982, pp. 726-731.
Smith, Chlipala, Bindels, Nelson, Fischer, and Mantz,
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Uchida, Iizuka, Matsunaga, Isobe, Konishi, Sekine, Ohtani,
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Primary Examiner—Hoai Ho
(74) Attorney, Agent, or Firm—-William L Paradice, III
A CAM device that allows defective rows in one CAM block to be functionally replaced by spare rows from any CAM block in the device. In some embodiments, the CAM device includes a main address decoder, a plurality of CAM blocks, a corresponding plurality of spare address decoders, and a block select circuit. In one embodiment, each CAM block includes a main CAM array having a plurality of rows of CAM cells each coupled to a corresponding word line, and a spare row of CAM cells coupled to a spare word line. Each spare row may be used to functionally replace a defective row in the same CAM block or in any other CAM block by programming the address of the defective row into the corresponding spare address decoder.
20 Claims, 14 Drawing Sheets