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(12) United States Patent
Kocaman et al.
(io) Patent No.: (45) Date of Patent:
US 7,215,171 B2 May 8, 2007
(54) DIGITALLY CONTROLLED THRESHOLD ADJUSTMENT CIRCUIT
(75) Inventors: Namik Kemal Kocaman, Irvine, CA (US); Afshin Momtaz, Laguna Hills, CA (US)
(73) Assignee: Broadcom Corporation, Santa Clara, CA (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 63 days.
(21) Appl. No.: 11/117,767
(22) Filed: Apr. 28, 2005
(65) Prior Publication Data
US 2006/0244506 Al Nov. 2, 2006
(51) Int. CI.
H03L 5/00 (2006.01)
(52) U.S. CI 327/307; 330/9
(58) Field of Classification Search None
See application file for complete search history.
(56) References Cited
U.S. PATENT DOCUMENTS
5,267,270 A * 11/1993 Miyashita et al 375/318
6,194,965 Bl * 2/2001 Kruczkowski et al 330/258
6,509,777 B2 * 1/2003 Razavi et al 327/307
* cited by examiner
Primary Examiner—Tuan T. Lam
A threshold adjustment circuit including: a current DAC for supplying or sinking a varying current; a differential pair of thin oxide transistors coupled to the DAC and coupled together at a common source node; a power supply for providing a supply voltage having a voltage level above reliability of the thin oxide transistors; and a third transistor for maintaining voltage of the common source node above a predetermined level and to disable the threshold adjustment circuit. The bulk and source of each of the differential pair thin oxide transistors is coupled to the common source node and each of the differential pair thin oxide transistors is switched by a signal to keep each of the differential pair thin oxide transistors in saturation region.
14 Claims, 5 Drawing Sheets