(12) United States Patent ao) Patent No.: Us 7,528,064 B2
Tang et al. (45) Date of Patent: May 5,2009
Microelectronic workpieces that have bump sites over bondpads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality of microelectronic dies comprising integrated circuitry and bond-pads, such as copper bondpads, electrically coupled to the integrated circuitry. The workpiece further includes (a) a dielectric structure having a plurality of openings with sidewalls projecting from corresponding bond-pads, and (b) a plurality of caps over corresponding bond-pads. The individual caps can include a discrete portion of a barrier layer attached to the bond-pads and the sidewalls of the openings, and a discrete portion of a cap layer on the barrier layer. The caps are electrically isolated from each other and self-aligned with corresponding bondpads without forming a mask layer over the cap layer.
20 Claims, 5 Drawing Sheets