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US006789175B2

(12) United States Patent ao) Patent No.: us 6,789,175 B2

Ryan et al. (45) Date of Patent: Sep. 7,2004 Page 2

(54) METHOD AND APPARATUS FOR

SYNCHRONOUS DATA TRANSFERS IN A
MEMORY DEVICE WITH SELECTABLE
DATA OR ADDRESS PATHS

(75) Inventors: Kevin J. Ryan, Eagle, ID (US); Terry R. Lee, Boise, ID (US)

(73) Assignee: Micron Technology, Inc., Boise, ID (US)

( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 241 days.

(21) Appl. No.: 09/974,350

(22) Filed: Oct. 9, 2001

(65) Prior Publication Data

US 2002/0016885 Al Feb. 7, 2002

Related U.S. Application Data

(62) Division of application No. 09/663,035, filed on Sep. 15, 2000, now Pat. No. 6,415,340, which is a division of application No. 09/301,422, filed on Apr. 28,1999, now Pat. No. 6,272,608, which is a division of application No. 08/891,097, filed on Jul. 10, 1997, now Pat. No. 6,044,429.

(51) Int. CI.7 G06F 13/16

(52) U.S. CI 711/151; 711/147; 710/52;

710/44

(58) Field of Search 710/5, 52, 54,

710/39, 40, 44, 244; 365/189.05, 189.07;

711/151, 147-149

(56) References Cited

U.S. PATENT DOCUMENTS

4,064,369 A 12/1977 Battocletti

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A synchronous dynamic random access memory ("SDRAM") operates with matching read and write latencies. To prevent data collision at the memory array, the SDRAM includes interim address and interim data registers that temporarily store write addresses and input data until an available interval is located where no read data or read addresses occupy the memory array. During the available interval, data is transferred from the interim data register to a location in the memory array identified by the address in the interim array register. In one embodiment, the SDRAM also includes address and compare logic to prevent reading incorrect data from an address to which the proper data has not yet been written. In another embodiment, a system controller monitors commands and addresses and inserts no operation commands to prevent such collision of data and addresses.

3 Claims, 9 Drawing Sheets

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U.S. PATENT DOCUMENTS

[table]

Taietal 365/189.07

Olson et al 365/238.5

Farah-Bakhsh et al.

Sato et al 365/189.11

Nakamura et al 711/103

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Bianchi
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Hirano et al.
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Lee 365/189.04

Casper

Yamashita et al.
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Casper et al.
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Yamagishi et al.
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Raad 365/203

Mori

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Hayashi et al.

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Kahle et al.
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Farmwald et al 365/230.06

Taylor 365/203

Yamauchi et al 365/189.05

Mochizuki et al 365/230.03

Sauer

Leung et al.

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McClure
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Raad 365/230.06

Farwell

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Wright et al 365/222

Naritake et al 365/227

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5.636.173 A 6/1997 Schaefer 365/230.03

5.636.174 A 6/1997 Rao 365/230.03

5,638,335 A 6/1997 Akiyama et al 365/230.03

5,649,157 A * 7/1997 Williams 711/151

5,650,971 A 7/1997 Longway et al 365/207

5,655,105 A 8/1997 McLaury

5,668,763 A 9/1997 Fujioka et al 365/200

5,682,342 A 10/1997 Suzuki

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5,694,065 A 12/1997 Hamasaki et al.

5^717,894 A 2/1998 Vivio

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5,737,276 A 4/1998 Shin et al 365/230.08

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RE35,934 E 10/1998 Takai 365/189.05

5,828,606 A * 10/1998 Mick 365/189.05

5,831,929 A 11/1998 Manning 365/233

5,841,717 A 11/1998 Yamaguchi 365/205

5,847,577 A 12/1998 Trimberger 326/38

5,854,911 A 12/1998 Watkins

5,870,347 A 2/1999 Keeth et al 365/230.03

5,870,625 A * 2/1999 Chan et al 710/5

5,903,916 A 5/1999 Pawlowski et al 711/167

5,905,874 A 5/1999 Johnson

5,923,594 A 7/1999 Voshell 365/189.05

5,946,245 A 8/1999 Brown et al 365/201

5,956,502 A 9/1999 Manning 713/503

6,014,759 A 1/2000 Manning 714/42

6,023,177 A 2/2000 Kim et al.

6,035,393 A 3/2000 Glew et al 712/237

6,044,429 A 3/2000 Ryan et al 710/131

6,061,772 A 5/2000 Webber et al 711/169

6,085,283 A 7/2000 Toda 711/104

6,088,774 A 7/2000 Gillingham 711/167

6,091,646 A 7/2000 Voshell 365/189.05

6,134,634 A 10/2000 Marshall, Jr. et al 711/143

6,148,381 A * 11/2000 Jotwani 711/158

6,154,814 A 11/2000 Uesugi 711/133

6,233,670 Bl 5/2001 Ikenaga et al 712/218

6,374,334 Bl 4/2002 Suga et al 711/158

FOREIGN PATENT DOCUMENTS

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