Method, apparatus, and computer program product for a cache coherency ...

US 20070022256A1

(io) Pub. No.: US 2007/0022256 Al (43) Pub. Date: Jan. 25, 2007

(54) METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR A CACHE COHERENCY PROTOCOL STATE THAT PREDICTS LOCATIONS OF SHARED MEMORY BLOCKS

(76) Inventors: Jason Frederick Cantin, Madison, WI (US); Steven R. Kunkel, Rochester, MN (US)

Correspondence Address:
IBM CORP (YA)
C/O YEE & ASSOCIATES PC
P.O. BOX 802333
DALLAS, TX 75380 (US)

(21) Appl. No.: 11/184,315

(22) Filed: Jul. 19, 2005

Publication Classification

(51) Int. CI.

G06F 13/28 (2006.01)

(52) U.S. CI 711/144

(57) ABSTRACT

A method, apparatus, and computer program product are disclosed for reducing the number of unnecessarily broadcast local requests to reduce the latency to access data from remote nodes in an SMP computer system. A shared invalid cache coherency protocol state is defined that predicts whether a memory read request to read data in a shared cache line can be satisfied within a local node. When a cache line is in the shared invalid state, a valid copy of the data is predicted to be located in the local node. When a cache line is in the invalid state and not in the shared invalid state, a valid copy of the data is predicted to be located in one of the remote nodes. Memory read requests to read data in a cache line that is not currently in the shared invalid state are broadcast first to remote nodes. Memory read requests to read data in a cache line that is currently in the shared invalid state are broadcast first to a local node, and in response to being unable to satisfy the memory read requests within the local node, the memory read requests are broadcast to the remote nodes.