(12) United States Patent ao) Patent No.: us 6,295,473 Bi
Rosar (45) Date of Patent: Sep. 25,2001
(54) DIGITAL DELAY LINE RECEIVER FOR USE WITH AN IMPLANTABLE MEDICAL DEVICE
(75) Inventor: George Rosar, Maple Grove, MN (US)
(73) Assignee: Medtronic, Inc., Minneapolis, MN (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 09/293,394
(22) Filed: Apr. 16, 1999
(51) Int. C I. A61N 1/08
(52) U.S. CI 607/60; 607/32; 128/903
(58) Field of Search 607/60,30-32,
(56) References Cited
U.S. PATENT DOCUMENTS
A body implantable medical apparatus includes circuitry for generating and transmitting a modulated analog data signal. A receiver receives and digitally demodulates the modulated analog signal. An analog-to-digital converting circuit produces an amplitude limited modulated digital signal corresponding to the modulated analog signal. The converting circuit includes an amplifier coupled to a receive antenna and a comparator having an input coupled to the amplifier and an output coupled to a digital demodulator. The digital demodulator demodulates the modulated digital signal to produce a digital information signal, such as a signal containing physiologic sensor data. The digital demodulator includes a digital delay line comprising a plurality of shift registers or, alternatively, a plurality of multiple-stage delay blocks each coupled to a tap selection device. The digital delay line includes an input coupled to an output of the converting circuit, an exclusive OR (XOR) gate having a first input coupled to an output of the digital delay line, and a conductor coupled between the input of the digital delay line and a second input of the XOR gate, such that delayed and non-delayed modulated digital signals are respectively applied to the first and second XOR gate inputs to produce a digital information signal at an output of the XOR gate. The digital demodulator may be implemented in a FieldProgrammable Gate Array (FPGA), in an Application Specific Integrated Circuit (ASIC) or using a digital signal processor. A control circuit is coupled to the digital demodulator to adjust a rate at which the digital demodulator operates.
41 Claims, 15 Drawing Sheets