(21) Appl. No.: 10/974,936
(22) Filed: Oct. 28, 2004
(65) Prior Publication Data
US 2005/0087867 Al Apr. 28, 2005
(30) Foreign Application Priority Data
Oct. 28, 2003 (TW) 92129954 A
(51) Int. CI.
H01L 23/48 (2006.01)
H01L 23/52 (2006.01)
H01L 29/40 (2006.01)
(52) U.S. CI 257/773; 257/786; 257/779;
(58) Field of Classification Search 257/773,
257/786, 701, 780, 779 See application file for complete search history.
A ball grid array package includes a substrate, a chip, a plurality of pads, a solder mask, a plurality of partitioning walls, and a plurality of solder balls. The substrate has an upper surface and a lower surface opposite to the upper surface. The chip is disposed on the upper surface of the substrate. The pads are disposed on the lower surface of the substrate and electrically connected to the chip. The solder mask is disposed on the lower surface of the substrate. The partitioning walls are disposed on the solder mask and between the adjacent pads. The solder balls are respectively disposed on the pads.
19 Claims, 3 Drawing Sheets