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(12) United States Patent
Perego et al.
(io) Patent No.: (45) Date of Patent:
US 7,921,245 B2 Apr. 5, 2011
(54) MEMORY SYSTEM AND DEVICE WITH SERIALIZED DATA TRANSFER
(75) Inventors: Richard E Perego, San Jose, CA (US);
Frederick A Ware, Los Altos Hills, CA (US)
(73) Assignee: Rambus Inc., Sunnyvale, CA (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl.No.: 12/696,807
(22) Filed: Jan. 29, 2010
(65) Prior Publication Data
US 2010/0131725 Al May 27, 2010
Related U.S. Application Data
(63) Continuation of application No. 12/116,439, filed on May 7, 2008, which is a continuation of application No. 11/549,841, filed on Oct. 16, 2006, now Pat. No. 7,478,181, which is a continuation of application No. 10/385,908, filed on Mar. 11, 2003, now Pat. No. 7,313,639.
(60) Provisional application No. 60/439,666, filed on Jan. 13, 2003.
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(Continued)
Primary Examiner — Christopher B Shin
(74) Attorney, Agent, or Firm — Vierra Magen Marcus &
DeNiro LLP
(57) ABSTRACT
A memory system with serialized data transfer. The memory system includes within a memory controller and a plurality of memory devices. The memory controller receives a plurality of write data values from a host and outputs the write data values as respective serial streams of bits. Each of the memory devices receives at least one of the serial streams of bits from the memory controller and converts the serial stream of bits to a set of parallel bits for storage.
40 Claims, 15 Drawing Sheets
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