(12) United States Patent ao) Patent No.: us 6,518,127 B2
Hshieh et al. (45) Date of Patent: Feb. 11,2003
(54) TRENCH DMOS TRANSISTOR HAVING A DOUBLE GATE STRUCTURE
(75) Inventors: Fwu-Iuan Hshieh, Saratoga, CA (US);
Koon Chong So, Fremont, CA (US);
Yan Man Tsui, Union City, CA (US)
(73) Assignee: General Semiconductor, Inc., Melville, NY (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 09/872,886
(22) Filed: Jun. 1, 2001
(65) Prior Publication Data
US 2001/0023961 Al Sep. 27, 2001
Related U.S. Application Data
(62) Division ol application No. 09/531,138, filed on Mar. 17, 2000.
(51) Int. CI.7 H01L 21/336
(52) U.S. CI 438/270; 438/242; 438/259;
(58) Field of Search 438/242, 259,
438/270, 271, 589; 257/328, 329, 330, 331, 332, 302, 335, 339, 488
(56) References Cited
U.S. PATENT DOCUMENTS
5,072,266 A 12/1991 Bulucea et al 357/23.4
5,164,325 A 11/1992 Cogan et al 437/29
5,298,781 A * 3/1994 Cogan et al 257/333
6,194,741 Bl * 2/2001 Kinzer et al 257/77
FOREIGN PATENT DOCUMENTS
WO WO 94 03922 2/1994 H01L/21/265
Baba Y, et al., "A Study on a High Blocking Voltage UMOS-FET With A Double Gate Structure", Proceedings of the 4th Int 'I Symposium on Power Semiconductor Devices andlC's (ISPSD '92), Tokyo, Japan, May 19-21, 1992, pp. 300-302.
* cited by examiner
Primary Examiner—Olik Chaudhuri
Assistant Examiner—-Theresa T. Doan
(74) Attorney, Agent, or Firm—Mayer Fortkort & Williams,
PC; Stuart H. Mayer, Esq.; Karin L. Williams, Esq.
A trench DMOS transistor cell is provided, which is formed on a substrate of a first conductivity type. A body region, which has a second conductivity type, is located on the substrate. At least one trench extends through the body region and the substrate. An insulating layer lines the trench. The insulating layer includes first and second portions that contact one another at an interface. The first portion of the insulating layer has a layer thickness greater than the second portion. The interface is located at a depth above a lower boundary of the body region. A conductive electrode is formed in the trench so that it overlies the insulating layer. A source region of the first conductivity type is formed in the body region adjacent to the trench.
2 Claims, 3 Drawing Sheets