APPARATUS AND METHOD FOR AN
ITERATIVE CRYPTOGRAPHIC BLOCK
Inventor: Brant Candelore, Escondido, CA (US)
Assignees: Sony Corporation, Tokyo (JP); Sony Electronics Inc., Park Ridge, NJ (US)
Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 532 days.
Appl. No.: 10/801,962
Filed: Mar. 15, 2004
Prior Publication Data
US 2005/0058291 Al Mar. 17, 2005
Related U.S. Application Data
Provisional application No. 60/497,690, filed on Aug. 25, 2003.
H04N 7/167 (2006.01)
U.S. CI 380/239; 380/268; 380/42;
380/44; 726/18; 726/19
Field of Classification Search None
See application file for complete search history.
U.S. PATENT DOCUMENTS
5,619,576 A * 4/1997 Shaw 380/44
5,751,811 A * 5/1998 Magnotti et al 380/28
5,825,879 A * 10/1998 Davis 380/216
6,192,129 Bl * 2/2001 Coppersmith et al 380/259
6,307,936 Bl * 10/2001 Ober et al 380/30
A method and apparatus for an iterative cryptographic block under the control of a CPU and without a fixed number of stages. In one embodiment, a first cryptographic block descrambles received information using an internal key or a preprogrammed key to form a descrambled key or descrambled data. A data feedback path stores the descrambled data as internal data and provides the internal data or the external data as data input to the first cryptographic block. A key feedback path stores the descrambled key as an internal key and provides the internal key or the preprogrammed key to a key input of the first cryptographic block. A second cryptographic block descrambles received content using a final descrambling key. Other embodiments are described and claimed.
16 Claims, 10 Drawing Sheets