US 7,535,396 Bl May 19, 2009
A digital-to-analog converter (DAC) having filter sections with differing polarity provides a low-noise, low area bipolar output solution in delta-sigma modulator based DACs. A shift register receives an input bit-stream and provides a series of tap outputs that are used to control application of a number of current sources to output summing nodes. The current sources are divided into mutually-exclusive sets of positive polarity and negative polarity current sources, which are not necessarily contiguous. In one embodiment, half of one of the sets of current sources precedes the other set of current sources, and the other half of the divided set of current sources provides the final set of output taps. The number of current sources in each set may be equal, so that the midpoint of the output corresponds to zero current.
20 Claims, 4 Drawing Sheets