Bonding sheet for electronic component and method of bonding electronic ...

United States Patent [19]

Yoshino et al.

[li] Patent Number: 4,887,760 [45] Date of Patent: Dec. 19,1989

[54] BONDING SHEET FOR ELECTRONIC

COMPONENT AND METHOD OF BONDING
ELECTRONIC COMPONENT USING THE
SAME

[75] Inventors: Thunekazu Yoshino, Kamakura;

Hiroshi Morita, Kawasaki; Hirotaka
Nakano, Yokohama; Nobno Hayashi,
Miura; Yuko Knbota, Kamakura, all
of Japan

[73] Assignee: Kabushiki Kaisha Toshiba, Kawasaki, Japan

[21] Appl. No.: 89,989

[22] Filed: Aug. 27,1987

[30] Foreign Application Priority Data

Aug. 27, 1986 [JP] Japan 61-198915

Sep. 25, 1986 [JP] Japan ;61-224763

Sep. 25, 1986 [JP] Japan 61-224766

[51] Int. CI* B23K 31/00; B23K 35/14;

B23K 35/24

[52] UJS. CI 228/56.3; 228/180.2;

228/253; 228/263.11

[58] Field of Search 228/120, 121, 122, 180.2,

228/158, 173.7, 263.11, 253, 56.3

[56] References Cited

U.S. PATENT DOCUMENTS

3,568,301 3/1971 Shibata 228/185

4,067,104 1/1978 Tracy 228/185

4,646,435 3/1987 Grassauer 228/180.2

4,705,205 11/1987 Allen et al 228/180.2

FOREIGN PATENT DOCUMENTS

0171662 of 1986 European Pat. Off. .

1919567 of 1970 Fed. Rep. of Germany .

2112466 of 1972 France .

0030448 3/1978 Japan 228/263.11

0134294 8/1982 Japan 228/263.11

1371738 10/1974 United Kingdom .

OTHER PUBLICATIONS

IBM Technical Disclosure Bulletin, vol. 28, No. 3, Aug. 1985, pp. 1184-1185.

IBM Technical Disclosure Bulletin, vol. 27, No. 8, Jan. 1985, p. 4855.

IBM Technical Disclosure Bulletin, vol. 17, No. 2, Jul. 1974, p. 627.

Primary Examiner—Richard K. Seidel

Assistant Examiner—William Scott Andes

Attorney, Agent, or Firm—Cushman, Darby & Cushman

[57] ABSTRACT

The bonding sheet of the present invention comprises a substrate having an opening, and a low-melting point bonding metal which closes the opening or is arranged on the peripheral portion of the opening, to project in the opening. According to a bonding sheet of the present invention, a low-melting point bonding metal is interposed between a conductor pattern of a substrate and electrode terminals of an electronic component, and is bonded by thermocompression at a low temperature without melting the low-melting point bonding metal, so that bonding of a large number of electrode terminals can be completed by a single bonding operation.

23 Claims, 5 Drawing Sheets