FIG. 4b is a top view of a typical layout for the cirSUBTHRESHOLD CMOS AMPLIFIER WITH cuit depicted in FIG. 4a.
OFFSET ADAPTATION FIGS. Sa-b are block diagrams of prior art transcon
BACKGROUND OF THE INVENTION 5 FIGS. Sc-d are block diagrams of transconductance 1 Field Of The Invention amplifiers which are suitable for use in the present in
The present invention relates to electronic circuits. vention. More specifically, the present invention relates to DETAILED DESCRIPTION OF A PREFERRED adaptive circuits. 10 EMBODIMENT
2. The Prior Art Referring first to FIG. la, a typical CMOS transcon
It has recently become apparent that large-scale ana- ductance amplifier as known in the prior art is shown, log circuits can be achieved using conventional CMOS FIG- lb is a transfer curve for the amplifier circuit of technology. The key to achieving very high levels of mGm la FiG. n, illustrates a typical input-offset voltcomplexity in an analog system is to operate the individ- 15 age condition which is characteristic of the amplifier ual transistors in their subthreshold region, where the FIG. la Note that when Vi=V2, the output of the drain current is an exponential function of the gate- amplifier is at a voltage of 5 volts, equal to the voltage source voltage. In this regime of operation, amplifiers 0n one of the power supply rails. As shown in FIG. lb, can be operated with current levels in the range from the active region of the amplifier lies in the region 10-12 A to 10-7 A. At these low currents, the drain 20 where the input voltage V1-V2 is the range from about current of the individual transistors saturates at drain 50 millivolts to zero. Those of ordinary skill in the art voltages above 100 to 200 mV, allowing analog opera- will readily recognize that, depending on the particular tion with the same power-supply voltages commonly offset voltages of the individual transistors, the transfer employed for digital circuits (0-5V in 1988). Because of curve of FIG. lb for any given amplifier could be the low power-supply voltage and low current level, 25 shifted to either the right or the left on the X axis of the total power dissipated by an individual amplifier is FIG. lb.
extremely small, making possible large-scale systems Those of ordinary skill in the art will also recognize employing 10* or more amplifiers. that the circuit of FIG. 1 suffers from another draw
Despite the numerous advantages of subthreshold back- That is, when the voltage Vou, is less than the operation, very few systems outside of the electronic 30 voltage V, the transistor Q2 will stop conducting and watch industry have taken advantage of this mode of the output voltage will no longer be a function of the operation. The major problems that have prevented differential input voltage.
application of subthreshold amplifiers have been their ^ circmt of FIG-}c- ^ ^ m the Pnor »*•15 input offset voltage and the limited input voltage range. meant to overcome the difficulty mentioned with re6 35 spect to the circuit of FIG. la. In the circuit of FIG. lc,
BRIEF DESCRIPTION OF THE INVENTION the current mirror comprising Q3 and Q4. and the cur
The present invention addresses both the input range rent mjrror comprising Qs and Q6 isolate the output and input offset problems, and makes possible the adap- ^ f?mu *e mp?J*fS' the TMPu
tation of subthreshold CMOS technology to a much An voltage to be free of the dependence on the mput volt
., - ,. ,. OJ 40 age exhibited by the circuit of FIG. la.
wider range of applications The circuit of FIG. lc also suffers from the input
An analog MOS integrated circuit comprises an am- ^ ^ ^ nQted witfa t tQ the circuit phfier circuit havmg a gam much larger than 1. The of FIQ bg seen b examination of FIG.
mput into one stage of this amplifier circuit is a floating u a ^ curve of the circuit shown m FIG
node formmg the gate ofat least one MOS transistor. A 45 ^ It wiu fee observed tnat tne linear rtion of the first capacitor couples an mput of the circuit to this ... curve (w ys V;n) is not symmetrical about the floating node and a second capacitor is connected from Vl = y2 positioa on the curve, For individual an output of the amplifier to this floating node. A win- amplifier circuit, the transfer curve of FIG. Id may be dow or opening m the metal layers above the second located at different positions along the X axis due to the capacitor allows ultraviolet light to fall onto both elec- 50 random Gffset voitage inherent in each circuit as a result trades of the capacitor, thus allowing the offset voltage of its manufacture. Because of the input offset voltage, of the amplifier to be adapted while the source of ultra- tne amplifier has an output current when the input voltviolet light is present. age difference is zero. Since these amplifiers are often
BRIEF DESCRIPTION OF THE DRAWINGS used as 'differential amplifiers, where they are con
55 nected so as to utilize the output current as a measure of
FIGS. la-Id are schematic diagrams and transfer tne input voltage difference, it is clear that the offset curves of prior art CMOS transconductance amplifiers. voltage prevents the amplifier from operating as in
FIG. 2 is a schematic diagram of a presently- tended, preferred embodiment of a CMOS subthreshold ampli- Those of ordinary skill in the art will note that a third fier with automatic offset adaptation according to the 60 drawback, common to the circuits of FIGS, la and present invention. FIG. lc, is that the range of input voltages for which the
FIGS. 3a and 3b are a cross-sectional view and a top output transfer function is approximately linear is very view, respectively, of a portion of the circuit of FIG. 2, small. When used as either a voltage output device, or a showing the location of the floating gate capacitors and current output device, as shown in FIG. Id, the range of the ultraviolet window. 65 output voltage for which the transfer function is ap
FIG. 4a is a schematic diagram of an alternate em- proximately linear is restricted to a range of differential bodiment of the present invention wherein the amplifier input voltage less than 200 millivolts. This factor, couis a simple inverter. pled with the random input offset voltage exhibited by