5 6
DC supply voltage V+, typically 9 VDC, to various points Thus, in this case, since the input pulse is positive, the circuit
in the circuitry of the test apparatus, as illustrated in FIG. 3. i00ks for a negative voltage. Such a negative voltage applied
The switch 24 is connected between common and the input to the cathode of the diode 63 wiu cause the transistor 64 to
of the inverter 25. Thus, when the switch 24 is closed, the , T,, • , c . £n ■ , , , , • ,
^ ri1 . ^ „ ' , , v ^ ^ , . , turn on. Ihe input of the inverter 69 is normally held high
input of the inverter 25 goes low and its output goes high on 5 . .
the supply line 27, this high being applied to the pulse by the capacitor 68, which is charged through the resistor
generator 30. 67a. When the transistor 64 turns on in response to the
More specifically, the high on the supply line 27 charges presence of an inductor, the capacitor 68 discharges through
the capacitor 32 through resistor 31, causing the output of the resistor 67 and the transistor 64, causing the input of the
the inverter 33 to go low, which thus causes the gate of the 10 inverter 69 to go low and its output, at circuit location "(5)",
MOSFET 40 to go low rendering it conductive and applying to go high. Thus, an "okay" inductor across the test leads 12,
a current pulse through the diodes 42 and the fuse 45 to the 13 causes the output of the transformer detector 62 to go
test lead 12. The parallel inverters 37-39 are needed to j - b provide sufficient current to drive the MOSFET 40. When
the capacitor 32 is charged to a predetermined voltage, it 15
discharges through the resistor 34 and the diode 35, causing The continuity detector 70 determines whether there is a
the gate of the transistor 40 to go high, thereby turning it off. high impedance (high resistance, high inductance or low
In this manner the capacitor 32 repeatedly charges and capacitance), preferably greater than approximately 10
discharges, generating a pulsating output test signal 140 ohms, across the test leads 12,13, which is interpreted as an
across the test leads 12, 13 for application to the tested 20 open circuit, or a low impedance, which is interpreted as a
device 15. The pulsating output signal 140 is illustrated in short circuit. Basically, the continuity detector 70 measures
waveform A of FIG. 4 and is in the nature of a square wave the level of the voltage across the test leads 12, 13. More
alternating between zero volts and a peak voltage VI, the V+ particularly, in the event that nothing is connected to the test
supply being dropped to VI by the diodes 42. The TVS 43 leads U, 13 (an open circuit) or if a connected circuit has a
and capacitor 44 protect the circuitry of the test apparatus 10 25 high impedance; each test pulse from the pulse generator 30
from voltage transients. The pulses may have about a will be applied through the diode 71 and the voltage divider
1-microsecond duration at a frequency of about 100 Hz. formed by ±e ... ?2 and ?3 tQ ±e ^ of ^ transistor
Referring to the capacitor detector 51, if the tested device ?4 TMs yoltage 145 (FIQ 4D) at the base of transistor 74
15 is capacitive, the test signal 140 will charge the capacitor, wiu be aboye a ... threshold ( about one.third the
the number of pulses required for this purpose depending on TM , x a- ■ , , , , ■ , nA , ■ ,
, . r, • „ , rf.f , , battery voltage), sufficient to turn on the transistor 74, which
the size of the capacitor. Once the capacitor is charged, the ... / ^ ,r , if „„ if , if ... _„
, . . — j. .. , *; .. . ,:r . will try to discharge the capacitor 80 through the diode 78
capacitor detector 51 functions by attempting to discharge , , . A „ m- • • r .
,,,,,, • • , , r „ • .1 j r 1 and the resistor 77. After a sufficient number of test pulses,
the tested device immediately following the end of each • rr- ■ ■
succeeding pulse of the test signal 140. More particularly, the capacitor 80 will be discharged sufficiently to bring the
the diode 52 and the resistor 53 cooperate with the base- 35 input of the inverter 81 low, causing its output, at circuit
emitter junction of the transistor 55 and the diode 56 to form location "(2J\ to go high, a discharge path to the output of the inverter 57, which is low
at this time. The discharge current turns the transistor 55 on. if, 0n the other hand, there is a short circuit or low
The input of the inverter 61 is normally held high by the impedance across the test leads 12,13, the voltage 146 (FIG.
capacitor 60, which is charged through the resistor 59, 40 4E) at the base of the transistor 74 will not be sufficient to
thereby holding the output of the inverter 61 at circuit turn it on xhus> the input of the inverter wiu remain held
location "(l)" low. Each time the transistor 55 is turned on, Mgh and ife Qutput wiu remain ^ indicating a short circuit. the capacitor 60 discharges through the resistor 58 and the transistor 55, eventually causing the input of the inverter 61
to go low and its output to go high. Thus, an "okay" 45 The outputs of the detectors 51, 62 and 70 are applied to
capacitor connected across the test leads 12, 13 produces a the control logic 90, which controls the operation of the
high at the output of the capacitor detector 51. indicator circuit 100 in accordance with the pattern of
The operation of the capacitor detector 51 is illustrated in outputs from the detection circuit 50. One input of each of
waveform B of FIG. 4, wherein 141 designates the charging the AND gates 125 of the indicator circuit 100 is connected
voltage of the capacitive device connected across the test 50 to the output of the blinker circuit 130 which, in a known
leads 12, 13, and 142 illustrates the discharge of the capaci- manner, produces a periodic output signal which alternates
tor through the capacitor detector 51 at the termination of the between high and low as long as the power supply switch 24
test pulse 140. is held closed. This alternating high and low will be passed
The transformer detector 62 operates by detecting a to one of the LEDs 110-113, whenever the corresponding
voltage across the test leads 12, 13 which is opposite in 55 one of the AND gates 125 is enabled by a high at its other
polarity to the voltage of the test signal pulse 140, since this input. Thus whenever an AND gate is enabled each high at
would be characteristic of an inductor, such as a transformer the output of the blinker circuit 130 will cause the output of
primary or secondary winding. More particularly, when a the AND gate to go high, turning on the associated one of the
pulse signal, such as the test pulse 140, is applied to an transistors 114-117 and lighting the corresponding one of
inductor, it results in a voltage across the inductor like that 60 me Jjjtjs H0-U3
illustrated in waveform C of FIG. 4. Thus, the voltage across
the inductor initially tracks the voltage of the input pulse
140, but in response to the trailing edge of the input pulse Table 1 is a chart illustrating the characteristics of the
140 there is an inductive "kick-back" voltage 144 of an device connected to the test leads 12,13, as indicated by the
opposite polarity to the input pulse, followed by an oscilla- 65 conditions of the indicator LEDs 110-113 and horn 101 in
tion or ringing. The transformer detector 62 looks for this response to corresponding to patterns of detection circuit
kick-back voltage 144 of opposite polarity to the input pulse. outputs.
