INTEGRATION OF PHOTON EMISSION
MICROSCOPE AND FOCUSED ION BEAM
CROSS-REFERENCE TO RELATED
This application claims priority from U.S. Provisional Application No. 60/587,327, filed Jul. 13, 2004.
FIELD OF THE INVENTION 10
This invention pertains to failure analysis for integrated circuits, and in particular to the integration of two important tools used in failure analysis, i.e., photon emission microscope, and focused ion beam. 15
BACKGROUND OF THE INVENTION
An important process component of integrated circuit manufacturing is Failure Analysis (FA). Generally FA is 20 performed in response to customer returns, which are in turn in response to product failure issues which take place in the field. Additionally, FA is utilized for design debug, i.e., the analysis of failures due to imperfection of designing or processing, and feedback to circuit designers or processing 25 fabs to correct the problem or to improve production yields. Many IC failures are can be observed as "hot spots", i.e., spots where electroluminescence processes take place from failed devices exhibiting electrical current leakage. The hot spots are a symptom of the defect, not the failure itself. 30 Therefore, the hot spots can occur at the actual site of a circuit short, or they can appear at a first location in response to a circuitry malfunction at a second location "upstream". These hot spots are most easily identified and localized by a tool known as the photon emission microscope (PEM), a 35 widely used tool for the detection of low-level light emission from failed devices. The PEM is described in D. L. Barton, P. Tangyunyong, J. M. Soden, and A. Y. Liang, Proceedings of 22nd ISTFA, p9, 1996, and U.S. Pat. Nos. 6,112,004 and 5,892,539, all of which are hereby incorporated by refer- 40 ence. The PEM is the quickest and the most effective tool for localizing hot spots, and does not require substantial a prior knowledge of the IC device. These aspects of the PEM make it the primary initial tool in the early phase of IC failure analysis, since in FA, the turn-around time is paramount. The 45 customer generally requires the fastest possible response time, since entire product lines may depend on the reliability of the incorporated IC's.
Once the hot spot is localized, the next step is to determine the cause of the failure which has produced the hot spot. One 50 technique used in this determination is to perform circuit edits such as cutting traces which may be triggering the hot spot, or by routing a new trace so as to avoid hot emission. This curcuit editing is generally performed using a Focused Ion Beam (FIB) in a FIB instrument. One such instrument is 55 the OptiFIB manufactured by NPTest, LLC, described in U.S. patent application Ser. No. 10/239,293 (patent application Publication No. US 2003/0102436), which is hereby incorporated by reference in its entirety. Following the editing of the likely triggering traces, the device is tested or 60 probed to verify that the failure is fixed. PEM can be utilized again as a probe tool to verify that the hot spot is gone as a result of the FIB edit. If the hot spot still exists, then the circuit edit process must be continued using the FIB until the failure is fixed. 65
The process outlined above is often iterative, i.e., requiring alternating between PEM and FIB tools multiple times.
Switching between a stand-alone PEM and a FIB machine is time consuming and inefficient. For each switch, mapping between imaging and CAD layout tools, i.e., circuit registration, is required in order to locate features and/or devices. In addition, system set-up time (e.g., vacuum interface and pumping, electrical interface, and CAD loading) is also required each time the sample or stimulation tools are loaded into the system. An integrated PEM/FIB tool would enhance efficiency in failure analysis and debugging, since both circuit validation by PEM and circuit edit by FIB would be in-situ, i.e., no transfer between instruments would be necessary.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide an apparatus and method for performing PEM and FIB operations in an integrated tool.
This object is met by modifying a photon-ion column FIB tool, in which the ion beam is concentric with an optical beam, to be able to perform in-situ photon emission probing.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is an illustration of a stand-alone PEM.
FIG. 2 is an illustration of a photon-ion column FIB tool.
FIG. 3a is an illustration of an integrated PEM-FIB tool.
FIG. 3b is an illustration of the vacuum interface portion of the PEM-FIB tool, including sample mounting.
FIG. 4 is a flow chart of the inventive method.
FIG. 5 shows an overlapped emission image and reflected image, showing hot spots.
FIG. 6a shows an emission image before FIB edit, showing hot spots.
FIG. 6b shows an emission image as in FIG. 6a, after FIB edit.
DETAILED DESCRIPTION OF THE
The present invention integrates a PEM with a FIB tool so as to accelerate FA. A FIB-optical dual beam system with a concentric beam axis is preferred, since the area of interest seen by both FIB and PEM is the same throughout the operation. The common focal plane of the FIB-optical dual beam system is also preferred, since it saves time in the FIB-PEM iteration process by minimizing the time of searching for features in the focal axis. For the convenience of direct comparison, field of view and magnification of both the optical and the FIB images should be adjusted so as to be identical, by adjusting the scan control voltages to the FIB electrostatic lenses. Simultaneous imaging is not required, but the capability of performing in-situ photon emission imaging as well as FIB circuit modification is required.
A Photon Emission Microscope, illustrated in FIG. 1, is a microscope designed for microscopic imaging of IC's with high detection efficiency with faint NIR emission. The major components of such a tool include: microscope tube with objective(s) 125, imaging sensor 130, illumination source 103 and optics 104, and specimen stage 105. Photon emission imaging, illustrated in FIG. 1, is generally performed by electrically stimulating the IC 100, either by simply powering the IC using a power supply 110 to place Vdd on the power line, or by connecting the IC to a tester unit 120. The tester unit can input a variety of electrical test patterns onto some or all of the IC input pins, and allows for static