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APPARATUS FOR DRIVING MATRIX-TYPE
LCD PANELS AND A LIQUID CRYSTAL
DISPLAY BASED THEREON
FIELD OF THE INVENTION 5
The present invention concerns an apparatus for driving matrix-type LCD panels and a liquid crystal display.
BACKGROUND OF THE INVENTION 10
FIG. 1 shows a block diagram of a conventional display module 10. Details of the electrical configuration for driving a simple matrix type liquid crystal panel 16 are illustrated. A plurality of segment electrodes (with N=384, for example) of the liquid crystal panel 16 are driven in parallel by a column driver bank 14 comprising an array of source drivers 14.114.x (with x=8, for example), and a plurality of common electrodes are driven by a row driver array 15 while being 2Q selected sequentially. An interface is used as the interface between a host computer (not illustrated in FIG. 1) and the display module 10. The interface function 12 is typically realized at the input side of a display timing controller 13. The column driver bank 14 drives, as mentioned, the N columns of 25 the LCD display 16 and it comprises N individual output buffers. Typically, each source driver 14.x of the column driver bank 14 serves n column electrodes of the display panel 16 by providing analog output signals. The row driver array
15 comprises an array of row drivers. Eachpixel of the display 3Q
16 is a switchable capacitor between a row and a column electrode. The display 16 may be a passive matrix LCD panel, for example.
Display data which represent an image to be displayed on the liquid crystal panel 16 are given to the column driver 14 as 35 serial data by the timing controller 13. Additional signals CLKN, CLKP and LD typically are also supplied to the column driver bank 14 by the controller 13. The controller 13 also supplies signals to the row driver array 15. The row driver array 15 selects a common electrode which should display 40 first in response to a vertical synchronization signal, and thereafter scans in the vertical direction by changing the common electrode to be selected successively while synchronizing with the horizontal synchronization signal.
FIG. 2 shows the internal configuration of the column 45 driver bank 14 shown in FIG. 1. The display data supplied from the controller 13 as serial data IF[1:N] are fed via an input interface 27 and a serial-to-parallel converter 26 for conversion from serial data to parallel data into a data latch 22 according to a data latch clock. A bi-directional shift register 50 21 is provided in order to be able to switch the direction from which the data are to be displayed on the panel 16. After the data were latched in the data latch 22, they are latched in a line latch 23 at every horizontal scanning period according to a horizontal synchronization signal LD. The data latch 22 55 serves as "data buffer" for loading data while another data set is read from the line latch 23. The output of the line latch 23 is sent via a digital-to-analog converter 24 to a liquid crystal drive output circuit 25. The data are transferred to the outputs Yl through Y480 (i.e. N=480 in the present example) by 60 means of the horizontal synchronization signal LD, also referred to as load signal in order to drive the display panel 16. The LD pulse comes in only after a whole line of dots (several source drivers) is ready. The drive output circuit 25 in the present example is able to drive N=480 columns. It comprises 65 N individual output buffers. In FIG. 2, the output buffer of the third column is designated with the reference number 31.
As the FIG. 3 shows, a column of the panel 16 can be regarded as a distributed RC-load. Each of the n rows is represented by an RC network. In FIG. 3 only the third column is depicted. Because in a conventional device the output buffer 31 is biased with a fixed current lbias, the L'row settles much earlier than the M'h row, as illustrated by means of two schematic U(t) timing diagrams.
In a conventional source driver 14, the output buffers 31 are designed such that the biasing current lbias, is defined for the most far away row, that is for the M'h row. As a consequence, those rows that are closer to the output buffer 31 see a biasing current lbias, that is too high. In other words, theses rows are "overdriven".
In the U.S. patent application published under US 2003/ 0112215 Al, a liquid crystal display and driver are described where a timing circuitry is provided that divides each row period into a drive period and a voltage maintenance period. During the driver period the output buffers use a higher biasing current in order to charge the column lines of the display panel. During the maintenance period, a lower biasing current is used to maintain the voltage on the column lines. This solution does, however, not address the problem described above where certain rows are driven with currents that are too high.
Thus, it would be generally desirable to reduce the power required to be drawn by the buffers.
It is thus an object of the present invention to provide a solution that takes into account the distance of the individual rows.
It is a further objective of the present invention to provide a concept for reducing the power consumption of an LCD driver.
It is a further objective of the present invention to improve conventional LCD drivers and to reduce their current consumption.
SUMMARY OF THE INVENTION
These disadvantages of known systems, as described above, are reduced or removed with the invention as described and claimed herein.
An apparatus in accordance with the present invention is claimed in claim 1. Various advantageous embodiments are claimed in claims 2 through 8.
A liquid crystal display in accordance with the present invention is claimed in claim 9 and advantageous embodiments are claimed in claims 10 and 11.
An apparatus according to the present invention comprises output buffers for driving the columns of an LCD panel. A bias generator is employed that provides a common biasing current to all output buffers. The apparatus further comprises means for providing information regarding the physical position of a dot to be driven on the LCD panel. According to the present invention, this information is obtained by counting the number of incoming load signals (LD). A switchable current source is employed that allows the level of the biasing current to be changed according to the physical position.
According to the present invention, a liquid crystal display is proposed that comprises a plurality of liquid crystal pixel electrodes arranged as an array of rows and columns. There is a plurality of row and column lines for driving the liquid crystal pixel electrodes, and a plurality of output buffers for driving the plurality of column lines. All output buffers are operable at a common biasing current. Special means for varying the common biasing current are provided, whereby the biasing current depends on the physical distance between the output buffers and the row to be driven.
By varying the common biasing current of all output buffers row period-by-row period, it is possible to reduce the power consumption of the source driver, whilst still providing sufficient current to switch the column lines in the time available. 5
It is an advantage of the present invention that it can be used for driving any kind of LCD display, such as a TFT display, or an OLED (organic light emitting display), for example. Additional features and advantages of the invention will be set forth in the description that follows, and in part will be appar- 10 ent from the description.
BRIEF DESCRIPTION OF THE DRAWINGS
For a more complete description of the present invention 15 and for further objects and advantages thereof, reference is made to the following description, taken in conjunction with the accompanying drawings, in which:
FIG. 1 shows a schematic block diagram of a conventional LCD display; 20
FIG. 2 shows a schematic block diagram of a conventional source driver;
FIG. 3 shows a schematic block diagram of one column and a plurality of rows of a conventional display panel;
FIG. 4a shows a schematic block diagram of a first appa- 25 ratus, according to the present invention;
FIG. 5 shows the biasing current depending on digital signals, according to the present invention;
FIG. 6 shows a schematic block diagram of a switchable current source, according to the present invention; 30
FIG. 7 shows a schematic block diagram of another apparatus, according to the present invention;
FIG. 8 shows a schematic block diagram of a LCD display, according to the present invention.
DESCRIPTION OF PREFERRED
FIG. 4 presents the most basic schematic of a device 40 according to the present invention. The device 40 comprises a 40 plurality of output buffers 41.1 through 41 .N for driving the N columns (01 through ON) of an LCD panel 46, as schematically depicted in FIG. 4. A switchable current source 42 provides a common biasing current lbias to all output buffers 41.1 through 41 .N. The device 40 comprises a bias line 44 that 45 is connected to all output buffers 41.1 through 41.N. The device 40 further more comprises means 43 for providing information regarding the physical position of a dot (respectively a row) to be driven on the LCD panel 46. According to the present invention, information about the row that is to be 50 driven during the next step is obtained by counting the number of incoming load signals LD. For this reason, the means 43 comprise an LD input 47. Each output buffer 41.1 through 41.N has a data input 47.1 through 47.N and an output Yl through YN. 55
The means 43 may comprise a counter that counts the LD signals. The counter 43 may comprise a series of flip-flops. A signal at the output of the last flip-flop in this series may be used to reset the counter. In order to ensure that the counter is properly initiated after power-on, an external reset may be 60 provided. The counter 43 issues a digital signal that represents the number of the row that is to be driven next. In the present example, the digital signal has N digits.
According to the present invention, the switchable current source 42 changes the level of the biasing current lbias accord- 65 ing to the physical position. Since the physical position is represented by a corresponding digital signal provided by the
counter 43, the switchable current source 42 comprises a number of digitally controlled switches. Depending on the digital signal, these switches provide a contribution to the biasing current lbias.
The means 43 and the switchable current source 42 can be realized in different ways. For the sake of simplicity, in the following an embodiment is described where the switchable current source 42 comprise M switches (each being formed by a pair of MOSFET transistors, for example) and where each of these switches contributes to the biasing current lbias only if the respective digit of the digital signal shows a logic "1". If all switches are identical, one can obtain a biasing current lbias as illustrated in FIG. 5. In this particular example, there are only four switches and four different bias current levels. If a digital signal "1000" is applied to the switchable current source 42, only the first switch contributes to the biasing current lbias. The biasing current lbiasl is x. If the digital signal is "1100", the resulting biasing current lbias2 is 2x, and so forth.
It is obvious that this is just one possible embodiment where the biasing current lbias varies step-by-step and the slope is linear, as illustrated by means oftheline50 in FIG. 5. One may implement other curves depending on the design of the liquid crystal display. Also the coding scheme used to set the switches of the switchable current source 42 may vary.
It should be noted that the buffer biasing current is not the complete current drawn by the output buffers, which generally is drawn from a power supply. This power supply is not shown in any of the Figures.
According to another embodiment, the number of current steps is reduced. If two adjacent rows are driven with the same biasing current lbias, one needs just M/2 different current steps. In this case, the first and second rows are both driven with the biasing current lbias. The third and fourth rows are driven with a biasing current lbias2, and so forth. This approach allows to reduce the number of transistor pairs inside the switchable current source 42 needed to provide the biasing current. If the LCD panel has M=1200 rows (in case of an UXGA panel), one would need 600 transistor pairs rather than 1200 transistor pairs.
It is also possible to further reduce the number of transistor pairs needed by forming groups each comprising q rows. If the LCD panel has M rows, this approach would required M/q transistor pairs. Assuming that the LCD panel has M=1200 rows and that q=10, one would need 120 transistor pairs only.
One possible embodiment of the switchable current source 42 is given in FIG. 6. As illustrated in this Figure, the current source 42 comprises a network of MOSFET transistors. The network comprises a first MOSFET transistor 51 that provides a pre-defined reference current and M MOSFET pairs, as illustrated in FIG. 6. Depending on the digital signal applied to the inputs 1 through N, small amounts of currents are added to the reference current. The resulting biasing current lbias is made available at an output 44.
A transistor serving as dummy switch may be positioned between the first MOSFET transistor 51 and the positive voltage node V. Such a dummy switch, if always in an onstate, may be employed for matching reasons. Note that this dummy switch is optional, however.
Yet another embodiment is illustrated in FIG. 7. In this Figure a device 60 is shown that comprises a switchable current source 42 (e.g. similar to the one shown in FIG. 6), a counter 53 and a prescaler 52. The prescaler 52 receives the load signal LD at the input 54, as indicated. The prescaler 52 issues a LD_in pulse for each M/q pulses LD at the input 55. The LD_in pulse is applied to the counter 53. The digital