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CIRCUIT WITH MEMORY FOR DETECTING INTERMITTENT CHANGES IN RESISTANCE, CURRENT, VOLTAGE, CONTINUITY, POWER INTERRUPTION, LIGHT, AND TEMPERATURE 5
1. Field of Invention
This invention relates to electrical test circuits and test instruments and specifically to circuits and instru- 10 ments for detecting intermittent and continuous electrical-resistance, voltage, current, continuity, and physical parameters for detecting illumination, and temperature.
2. Prior Art
There are many electrical test instruments and cir- 15 cuits that are used to detect voltage, current, resistance, power interruptions, and other physical parameters such as light, and temperature.
These circuits and instruments typically utilize galvanometers, digital meters, light and, sound indicators, 20 and cathode ray tubes. A typical multi-function meter detects electrical signals that are constant or changing slowly. An oscilloscope detects electrical signals that change rapidly and are repetitious or occurs with a period of not usually longer than several minutes. An 25 intermittent electrical fault having a brief time duration or a physical parameter that changes rapidly but not periodically is difficult or impossible to detect with with the typical test instruments or circuits.
Most users of electrical test instrument or circuits 30 would find desirable a device that detects intermittent electrical parameters or physical parameters that can be converted to electrical signals.
This invention has many unique features that are not cited in prior art. This invention consists of a primary circuit that is common to all embodiments of this invention.
The primary circuit consists of: 40
a. Schmitt-trigger input memory that detects fast or slow signal changes.
b. Logic level output that can be used for external control circuits.
c. Visual indicator. 45
d. Defeatable audio indicator with tuneable frequency.
e. Selectable manual memory reset.
f. Selectable, time delayed, automatic memory reset.
g. Indicating output that the fault detected is steady 50 state or intermittent.
This invention utilizes numerous signal conditioning circuits, "front ends" that converts various electrical and physical parameters to logic voltage levels. These different "Front Ends" are: 55
1. Open circuit detector.
2. Closed or short circuit detector.
3. AC power interruption and frequency decrease detector.
4. DC power interruption detector. 60
5. Voltage window detector.
6. Current detector.
7. Resistance detector.
8. Temperature detector.
9. Light (illumination) detector. 65
10. Missing electrical pulse detector.
All or a portion of these "front ends" can be used with the primary circuit to form a multi-function test circuit,
or one "front end" may be used with the primary circuit to make a special purpose (one function) test circuit.
All embodiments of this invention detects intermittent changes in the parameter being measured and provides a visual indication or alarm, and an audio indication or alarm that may be defeated. The time duration of intermittent signals that are detectable by this invention depends on the speed of response of the various "front ends" but, they are between approximately 10 milliseconds for detecting 50 Hz AC power interruption to fractions of a microsecond for the open or closed circuit detector.
A potential main use of this invention would be in detecting electrical conditions of short time duration such that standard ohm, volt, and ampere meters can not detect, and are so rare or infrequent an oscilloscope would be impractical.
OBJECTS AND ADVANTAGES
Accordingly we claim that this invention has the following objects and advantages:
It detects intermittently closed (short) circuits, "It detects intermittently open circuits,
It detects intermittent direct current electrical power interruptions,
It detects intermittent alternating current electrical power interruptions and intermittent decreases in frequency,
It detects intermittent changes in direct current voltages that are outside preset high and low limits,
It detects intermittent changes in direct current that are outside preset high and low limits,
It detects intermittent changes in resistance, that are outside preset high and low limits,
It detects intermittent changes in physical parameters such as light, and temperature that are outside preset high and low limits,
It detects intermittent conditions as brief as fractions of microseconds that, may occur as infrequently as days apart.
It also detects steady state electrical and physical parameters which are within the capability of prior art.
This invention is embodied as individual circuits capable of detecting a single parameter or as a multi-function test circuit having the capability to detect numerous parameters. This invention is well suited to be packaged as a hand-held test instrument or as a "built in" special test or monitoring circuit.
Readers will find further advantages and potential uses of the invention through considering the ensuing descriptions and drawings.
BRIEF DESCRIPTION OF DRAWINGS
FIG. I is a simplified block diagram of the preferred embodiment of the invention, a multi-function test circuit.
FIG. 2 is a schematic of the latching memory, memory reset, and indicating circuit.
FIG. 3 is a schematic of a fused input circuit.
FIG. 4 is a schematic of a detector of open or closed circuits with memory.
FIG. 5 is a schematic of a direct current power interruption detector with memory.
FIG. 6 is a schematic of an alternating current power interruption and decrease in alternating current frequency detector with memory.
FIG. 7 is a schematic of the precision voltage window detector.
FIG. 8 is a schematic of a direct current voltage conditioning circuit.
FIG. 9 is a schematic of a resistance to voltage condi- 5 tioning circuit.
FIG. 10 is a schematic of a direct current to voltage conditioning circuit.
FIG. 11 is a schematic of a detector of open or closed circuits with memory configured for use in a multi- 10 function application.
FIG. 12 is a schematic of a missing electrical pulse detector.
FIG. 13 is a schematic of an alternating current and direct current power interruption, and a decrease in 15 alternating current frequency detector, configured for use in a multi-function application.
FIG. 14 is a block diagram of a precision voltage detector with memory.
FIG. 15 is a block diagram of a precision current 20 detector with memory.
FIG. 16 is a block diagram of a precision resistance detector with memory.
FIG. 17 is a block diagram of a precision temperature detector with memory. 25
FIG. 18 is a block diagram of a precision light (illumination) detector with memory.
Detailed description of a multi-function test circuit 30 which detects electrical continuity for open or closed circuits, direct current power interruptions, alternating current power interruptions or decrease in frequency. The test circuit also detects voltages, resistances, and currents that are greater than or less than a preset win- 35 dow of high and low limits.
Referring to FIG. 1, a block diagram of the preferred embodiment of this invention, circuit 180 consists of a multi-function conditioning circuit, 140 connected to circuit 150. Circuit 140 consists of input terminals 1, and 40 2 which are connected to the common terminals of switches 30, and 50 respectively. Multi-position outputs of switches 30, and 50 are connected to: Detector of Open or Closed Circuits 110A; Alternating Current and Direct Current Power Interruption Detector 115; Miss- 45 ing Pulse Detector 114; Direct Current Voltage Conditioning 120; Resistance to Voltage Conditioning 121; and Direct Current to Voltage Conditioning 122.
Circuits 120, 121, and 122 connect to multi-position terminals of switch 60, the common terminal of 60 con- 50 nects to output 130. Output 130 connects to input 90 of circuit 113, Voltage Window Detector Circuit. The output of circuits 110A, 114,115, and 113 connect to the multi-position terminals of switch 40; the common terminal of switch 40 connects to output 4 and 4 connects 55 to input 3 of circuit 150, the Latching Memory, Memory Reset, and Indicating Circuit. Complete details of circuit 150 are illustrated in FIG. 2 and described in its detailed description. Complete details of the elements of circuit 140 are included in FIG. 7 through through 60 FIG. 13.
Detailed description of the Latching Memory, Memory Reset, and Indicating Circuit 150: Circuit 150 is common to all embodiments of this invention. Referring to FIG. 2 the input to the Latching Memory, Memory 65 Reset, and Indicating Circuit 150; is 3 which is connected to resistor 26. Resistor 26. Resistor 26, typically 470K ohms, is connected to zener diode 27 and terminal
A of logic gate 5. The combination of 26 and 27 form protect circuit 106 and is to prevent damage to 5. The reverse breakdown voltage of 27 should be with in plus or minus 0.5 volts of the power source 41. Logic gates 5,6,7, and 8 are dual input, high input impedance, NAND Schmitt trigger gates. The output of gate 5 is connected to input A of gate 6 and the output of 6 is connected to terminal B of 5, and resistor 23, this cross connected configuration of 5 and 6 form the latching memory circuit 100. The output of 5 is also connected to resistor 18 and the normally closed contacts of switch 12 and to external output terminal 11. Resistor 23 is connected to light emitting diode (LED) 9. LED 9 also connects to V+ power. Resistor 23 is typically 1-2K ohms. The combination of 23 and 9 form visual indicator circuit 101, and functionally 9 is illuminated when 100 is latched or in alarm mode.
The normally open terminal of switch 12 is connected to electrical ground. The common terminal of 12 is connected to terminal A of gate 7. The output of 7 is connected to variable resistor 14 and a piezo electric audio transducer 10. Transducer 10 is connected to power source V+. Variable resistor 14 is connected to capacitor 15. The junction of 14, and 15 connect to input B of 7, and 15 also connects to electrical ground. The combination of 7, 10, 14 and 15 form the audio indicator circuit 102. Functionally when the normally open contact of switch 12 is closed the audio indicating circuit is disabled.
Resistor 18 is connected to the anode of diode 21 and the cathode of diode 22. Variable resistor 19 is connected to the cathode of 21, the anode of 22, capacitor 20, and terminal A of logic gate 8. Capacitor 20 is typically a low leakage electrolytic type having a capacitance of 4.7 to 10 micro farads. The negative terminal of 20 is connected to electrical ground. Components 18, 19, 20, 21, 22 all form a variable time delay circuit 105. Variable resistor 19 is typically equal to greater than 1 Meg ohm. When the combined resistance of 18 and 19 is 1.5 Meg ohm and capacitor 20 is 4.7 micro farads the time delay is approximately 6 seconds.
The output of gate 8 is plurally connected to resistor 16 and the normally closed contact of switch 13. Capacitor 17 is connected to resistor 16 and to input B of gate 8. The combination of 8,16,17 make the automatic reset circuit, 103 which is a sub audio frequency oscillator. Resistor 16 and Capacitor 17 are selected to have a time constant of 100 to 500 milliseconds, when calculated in a manor familiar to those skilled in the art. The negative terminal of 17 is connected to electrical ground. The auto reset circuit produced low frequency pulses at approximately 2 to 10 Hz. The first pulse will reset latching memory 100 if the signal that latched it was momentary. However; if the signal that latched 100 is a continuous "low" logic level voltage, the low frequency pulses from 103 will not reset 100 and LED 9 will flash, and the audio tone of 10 will warble at the low frequency rate.
The normally open contact of switch 13 is connected to momentary switch 25 and a second contact of 25 is connected to electrical ground. Switch 25 and 13 form the manual reset circuit 104. Resistor 24 is connected to the common terminal of switch 13 and terminal B of gate 6. Resistor 24 connects to V+ which provides a logic "high" voltage to terminal B of gate 6 when neither the automatic reset or the manual reset signal is not present.