METHOD AND APPARATUS FOR
BRIGHTNESS CONTROL IN A FIELD
BACKGROUND OF THE INVENTION 5
1. Field of the Invention
The invention generally relates to flat panel display screens, and more particularly relates to flat panel field emission displays (FEDs). 10
2. Prior Art
Cathode ray tube (CRT) displays generally provide the best brightness, highest contrast, best color quality, and largest viewing angle of prior art displays. CRT displays typically use a layer of phosphor which is deposited on a thin 15 glass faceplate. These CRTs generate a raster image by using electron beams which generate high energy electrons that are scanned across the faceplate in a desired pattern. The electrons excite the phosphor to produce visible light which in turn form the desired image. However, CRT displays are 20 large and bulky. Hence, numerous attempts are being made to devise a commercially practical flat panel display that has comparable performance as a CRT display but is more compact in size and weight.
Flat panel field emission displays (FEDs) meet the above 25 requirements and therefore are the potential replacement for CRT displays. Reference is now made to FIG. 1 illustrating a cross sectional view of a portion of a typical FED. As shown in FIG. 1, FED 100 comprises field emission cathode 101, faceplate 102, anode 103, phosphor layer(s) 104, and 30 spacers 105.
Field emission cathode 101 comprises baseplate 106, emitters 107, row electrodes 108, column electrodes (also known as gate electrodes) 109, insulating layer 110, and 3J resistor layer 111. Row electrodes 108 are on top of baseplate 106. Resistor layer 111 is electrically connected to row electrodes 108. Insulating layer 110 is attached on top of resistor layer 111. Insulating layer 110 is made out of a dielectric material to electrically insulate resistor layer 111 4Q from column electrodes 109 that are attached on top of insulating layer 110. Column electrodes 109 have cutouts 112 providing clear paths between emitters 107 and phosphor layers 104. Emitters 107 are formed on and are electrically connected to resistor layer 111. 45
Faceplate 102 forms a sealed enclosure with baseplate 106. Typically, faceplate 102 is made of glass and is spaced apart from baseplate 106. Anode 103 is layered on top of faceplate 102. Phosphor layers 104 are deposited on top of anode 103. Spacers 105 help keep faceplate 102 a required 50 distance apart from baseplate 106 against the force of outside atmospheric pressure.
A control circuit controls voltage levels of row electrodes 108 and column electrodes 109 to establish a bias voltage between emitters 107 and column electrodes 109. The 55 voltage on column electrodes 109 (hereinafter known as gate voltage) creates an electric field which triggers emitters 107 to emit electrons. Upon being emitted, the electrons are attracted toward anode 103 due to its positive (+) polarity. When the electrons strike phosphor particles in phosphor go layers 104 which are deposited on faceplate 102, visible light is produced to form images.
Resistor layer 111 helps to make the emission characteristic more spatially uniform so that pixel characteristics such as color, brightness, etc. are uniform throughout the display. 65 Resistor layer 111 can be made out of a number of materials such as Cermet, silicon carbide, or a combination of both.
Since effects such as temperature change, contamination, etc. may cause the electrical characteristics of resistor layer 111 to vary during operation, the value of the resistance of resistor layer 111 can change which in turn can alter the slope of the cathode voltage-to-current curve. These variations in the resistor characteristics can cause the overall brightness of the FED screen to vary with the operational temperature. Accordingly, the brightness of the display can be adversely affected by changes in operating temperature of the FED.
In the Prior Art, to prevent such adverse effects, the resistor material is formulated to have near-zero temperature coefficient. However, the Prior Art techniques are difficult to carry out which cause manufacturing costs to increase. At the same time, the Prior Art techniques are generally not completely effective in preventing the adverse effects because the resistor material still has some variations with temperature.
As well, if the emission characteristic of the emitters 107 (FIG. 1) changes over time, due to contamination, erosion or other mechanisms, this can produce a corresponding change in display brightness. A cost effective method is needed to compensate for the changes in the emission characteristic.
Thus, a need exists for a less costly and more effective apparatus and method to provide brightness adjustments for FEDs operated over a range of temperatures and to compensate for the changes in the emission characteristic discussed above.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a less costly and more effective apparatus and method to compensate for brightness variations within FEDs during operation.
In one embodiment, the present invention meets the above need with a closed loop compensating circuit which comprises a sample display circuit, an error adjusting circuit, and an inverting circuit. The sample display circuit has substantially similar operating characteristics as the FED panel display. The error adjusting circuit receives a performance indication signal from the sample display circuit. Next, the error adjusting circuit determines a difference signal from the performance indication signal received and a reference signal. The error adjusting circuit then provides the difference signal to the FED and the sample display circuit.
The inverting circuit receives the difference signal from the error adjusting circuit and inverts the polarity of the difference signal. The inverting circuit provides the inverted difference signal to the panel display and the sample display circuit. The difference signal and the inverted difference signal are then used to cause electrical adjustments (e.g., column and row drive lines voltages) to be made in decreasing the difference signal.
In an alternate embodiment, the compensating circuit is an open loop compensating circuit which comprises a sample resistor, an error adjusting circuit, and an inverting circuit. The sample resistor is made from the same material as the resistor layer in the FED. The error adjusting circuit determines a difference signal between a signal across the resistor layer and a reference signal. The inverting circuit inverts the difference signal. The difference signal and the inverted difference signal are then used to cause electrical adjustments to be made in decreasing the difference signal.
In providing the above circuits, the present invention offers mechanisms for increasing or decreasing the brightness of an FED screen in response to temperature or emission characteristic induced brightness variations thereof.