The present invention is directed toward a method and apparatus for application specific testing of PLDs.
In accordance with one embodiment of the present inven
NOT APPLICABLE t'on' 311 aPParams includes a PLD. The PLD includes
resources. The resources include a first set and a second set.
STATEMENT AS TO RIGHTS TO INVENTIONS The first set imPlements a customer application The first set
MADE UNDER FEDERALLY SPONSORED 10 includes less than all of the resources. The second set is
RESEARCH OR DEVELOPMENT different from the first set. The second set is configured to
perform a test on the first set and to generate a test result.
NOT APPLICABLE In accordance with another embodiment of the present
invention, a system tests a device. The system includes a
REFERENCE TO A "SEQUENCE LISTING," A 15 PLD and a test unit. The PLD has resources. A set of the
TABLE, OR A COMPUTER PROGRAM LISTING resources is used for implementing a customer application.
APPENDIX SUBMITTED ON A COMPACT The set includes less than all of the resources of the PLD.
DISK Xhe test unit is coupled to the PLD and is configured to
2q perform a test only on the set and to generate a test result.
In accordance with yet another embodiment of the present invention, a method tests a PLD having a plurality of resources. The method includes the following steps. First, a set of the resources that is used for implementing a customer
The present invention relates to testing programmable application is identified. The identified set includes less than
logic devices (PLDs). In particular, the present invention all of the resomces on the PLD. Second, a test is performed
relates to testing those portions of PLDs that are important on me set and a test result is generated.
to customers. ... . The embodiments of the present invention allow the A PLD is a programmable circuit device that can include testi of pLDs based Qn ^ abm of ^ customer to many diverse components, such as programmable logic (for 3Q fom testi ^ reduction of the time required for testing performing logic operations on input data) as well as spe- a ^ ^ of the cust0mer's application, among ciahzed components, such as phase-locked loops (PLLs), other advantages delay-locked loops (DLLs), digital signal processors (DSPs), memory, etc. The PLD also includes "interconnects" that connect the components to each other and to inputs and outputs. These components and their interconnects may be referred to generally as "resources". The Embodiments of the present invention will now be resources of the PLD can be controlled and connected in described with reference to the following detailed descnpconfigurable ways in order to perform whatever specialized ^on drawings, in which.
application a customer wishes. FIG. 1 is a block diagram of a PLD according to an
Traditional testing of PLDs is similar to testing of other 4° embodiment of the present invention;
integrated circuit devices. Namely, all the inputs, outputs, FIG. 2 is a block diagram of an external test system
resources, and interconnects are tested for defects. Such according to an embodiment of the present invention;
testing takes time. Such testing is normally performed by piG. 3 is a block diagram of an internal test system
specialized equipment at the PLD manufacturer. If a defect 45 according to an embodiment of the present invention;
is found, the PLD is identified as defective. The defective pl& 4 ig & flowchart of a method according to an
PLD is not further configured and is not provided to the embodiment of the present invention; customer. The detective PLD may be analyzed to determine
the cause of the defect, or the defective PLD may simply be . FI& 5 18 a bl°ck dla^anl of interconnect testing accordscrapped. In either case, the defective PLD can be viewed as m% to 311 embodiment of the present invention; an inefficiency that reduces the revenue of the PLD manu- FIG. 6 is a flowchart of a method of interconnect testing facturer. according to an embodiment of the present invention;
Testing all of the resources in the entire PLD is time- FIG. 7 is a block diagram of logic element testing
consuming, in development time as well as actually running according to an embodiment of the present invention;
the tests. Due to the number of configurations involved and 55 FIG. 8 is a flowchart of a method of logic element
the pins required to run the factory tests, they are also according to an embodiment of the present invention;
unsuitable for use in a customer's system. FIG 9 is a block diagram of function block testing
In many cases, the customer does not require the use all according to an embodiment of the present invention;
the resources of the PLD in the customer's application. In FIG 1Q is a flowchart of a memod of function block
such cases, even if a particular PLD has a defect, if that 60 testing according to an embodiment of the present invention;
defect is unimportant to the customer's application, that „T^, „„ . . . _
^- 1 nr 4-11 1 • * ? Jt * FIG. 11 is a timing diagram oi testing according to an
particular PLD may still be appropriate for the customer. , _ , ° . . ° °
_ , _ i i i embodiment oi the present invention;
inere is a need for a customer to easily perform testing .
after receiving the PLD from the manufacturer. Further, FI& 12 18 a state relatlnS to FI& U>
there is a need to reduce the time required for testing a PLD. 65 FIG- i3 is a timing diagram of testing according to an
Finally, there is a need to test PLDs based on knowledge of embodiment of the present invention; and
the customer's application. FIG. 14 is a state diagram relating to FIG. 13.