A memory system includes Synchronous Dynamic Random Access Memory (SDRAM) A memory controller communicates with the memory, generates an SDRAM clock signal, that receives a bi-directional sampling clock signal (DQS) that is generated based on the SDRAM clock signal, and reads data from the memory based...http://www.google.com/patents/US7535791?utm_source=gb-gplus-sharePatent US7535791 - Integrated memory controller