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FREQUENCY OFFSET CORRECTION
CIRCUIT DEVICE
FIELD OF THE INVENTION
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The present invention relates to a semiconductor circuit device for detecting and correcting a frequency offset generated between a transmit side and a receive side in data communication through FSK radio communication using an FSK signal, which is one of frequency modulation signals. 10
BACKGROUND OF THE INVENTION
Conventionally, data communication for wirelessly transmitting various data through FSK radio communication using 15 an FSK (frequency shift keying) signal is widely used as a system of data communication. The FSK signal is one of FM (frequency modulation) signals.
In the data communication through FSK radio communication, when data is transmitted, a high-frequency signal is 20 transmitted as a radio wave, the high-frequency signal having been frequency-modulated by frequency-shifting a carrier so as to correspond to 1 and Oof a digital signal ofthe data. When the high-frequency signal is received by an FSK receiver and the transmitted data is demodulated, the frequency compo- 25 nents of a demodulation baseband signal having been voltage-converted by an F-V converter circuit are compared with each other by a comparator to determine a digital value, and the original data is obtained based on the digital value.
In the frequency modulation system, between a transmit 30 side and a receive side, a frequency offset occurs due to a frequency generation error on a quartz radiator, a local oscillator (hereinafter, referred to as PLL), and the like of the transmit side and receive side. The frequency offset becomes a DC offset component when frequency-voltage conversion is 35 performed to obtain a demodulation baseband signal.
In conventional FSK receivers, FSK demodulation is performed in an analog manner, and thus a frequency offset is equivalent to a fluctuation in the reference voltage of a comparator for data decision. Further, due to a frequency offset, 40 the frequency of a carrier is shifted close to the cutoff frequency of a filter when the carrier passes through the filer. Thus, particularly in the case of communications in a narrow transmission band, the attenuation of the filter exercises considerable influence. These factors have seriously adverse 45 effects on the receiving characteristic of the FSK receivers.
As described above, in the conventional FSK receivers (for example, Japanese Patent Laid-Open No. 2000-349840), FSK demodulation is performed in an analog manner. In this case, a demodulation baseband signal having undergone fre- 50 quency-voltage conversion is extracted by C coupling and a DC offset component on the demodulation baseband signal is removed, so that a demodulation error caused by a DC offset is corrected and the adverse effects on the receiving characteristic are avoided. 55
Further, a difference is obtained between the signal where the DC offset component on the demodulation baseband signal is removed by C coupling and a demodulation baseband signal with a DC offset before C coupling, so that the DC offset component is detected on the demodulation baseband 60 signal having undergone frequency-voltage conversion. The reference voltage in a comparator for data decision is corrected according to an offset amount and a frequency offset is equally corrected.
However, in the conventional method of correcting a fre- 65 quency offset, all circuits including detectors and correcting units conventionally have analog configurations in the FSK
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receivers. In this case, there are many variations in operating characteristics among the circuits, the accuracy of detecting a DC offset component from a demodulation baseband signal is reduced by noise, and thus a DC offset cannot be accurately detected or corrected. Consequently, operations become susceptible to noise and become less stable in a data communication system through FSK radio communication.
Once a malfunction occurs due to noise, the circuits may enter an oscillation state. Thus, the power consumption of an overall system increases, the data communication system becomes less stable, and the reliability of data communications seriously decreases.
DISCLOSURE OF THE INVENTION
The present invention is devised to solve the conventional problems and provides a semiconductor circuit device which can obtain more stable operations against noise in a data communication system without increasing the power consumption of the overall system, thereby improving the reliability of data communication.
In order to solve the problems, the semiconductor circuit device of the present invention is a semiconductor circuit device for demodulating digital data from a high-frequency signal having a carrier frequency-modulated based on the digital data, comprising a digital IQ demodulator for performing quadrature demodulation on a digital signal obtained by digital conversion from an analog signal having been obtained by frequency-converting the high-frequency signal while using the oscillation output of a PLL as a reference frequency signal, an F-V converter circuit for converting a frequency of a digital output signal from the digital IQ demodulator to a voltage and outputting a demodulation baseband signal corresponding to the digital data after passing the digital output signal through band-pass filters, a maximum value holding circuit for holding the maximum value of the demodulation baseband signal outputted from the F-V converter circuit, a minimum value holding circuit for holding the minimum value of the demodulation baseband signal, an averaging circuit for averaging the maximum value of the demodulation baseband signal and the minimum value of the baseband signal, a frequency offset detector for detecting a frequency offset amount on the demodulation baseband signal from the averaging circuit, and an offset correcting unit for correcting the frequency offset amount on the demodulation baseband signal by using the frequency offset amount as a feedback signal to a threshold value for deciding the data of the demodulation baseband signal, the frequency offset amount having been detected by the frequency offset detector.
With this configuration, a frequency offset is accurately detected with a small circuit size and fed back to a threshold value for data decision, thereby accurately performing data decision of the demodulation baseband signal and improving a receiving characteristic.
The semiconductor circuit device of the present invention further comprises a frequency converter circuit for frequency-converting the frequency offset amount having been detected by the frequency offset detector, and a filter bandwidth correcting unit for correcting the bandwidth of the band-pass filter based on a frequency converted value corresponding to the frequency offset amount having been calculated by the frequency converter circuit.
The semiconductor circuit device of the present invention further comprises a demodulator offset correcting unit for correcting the frequency offset amount on the demodulation baseband signal for the digital IQ demodulator based on the
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frequency converted value corresponding to the frequency offset amount having been calculated by the frequency converter circuit.
The semiconductor circuit device of the present invention further comprises a PLL frequency correcting unit for con- 5 trolling the frequency of the oscillation output of the PLL and correcting the frequency offset amount on the demodulation baseband signal based on the frequency converted value corresponding to the frequency offset amount having been calculated by the frequency converter circuit. 10
With this configuration, it is possible to make a correction in the same direction as the center frequency of the filter relative to the cutoff frequency of the filter, thereby improving the receiving characteristic.
The semiconductor circuit device of the present invention 15 further comprises a feedback gain circuit which provides a given gain for the frequency offset amount having been detected by the frequency offset detector, and uses the frequency offset amount as the feedback signal to the threshold value for deciding the data of the demodulation baseband 20 signal.
With this configuration, a correction amount is adjusted by the feedback gain circuit, thereby improving the stability of a system.
The semiconductor circuit device of the present invention 25 further comprises an operation controller circuit for periodically operating the frequency offset detector, and a timer counter for counting a duty cycle of the frequency offset detector operated by the operation controller circuit.
The semiconductor circuit device of the present invention further comprises a counting period storage device for storing a set value for setting the counting period of the timer counter at a given value.
The semiconductor circuit device of the present invention 35 further comprises a frequency offset value storage device for storing the frequency offset value having been detected by the frequency offset detector, and an operation controller circuit for exercising control to update the value of the frequency offset value storage device with a given period.
With this operation, the system is intermittently operated arbitrarily or automatically, thereby reducing the power consumption of the system.
The semiconductor circuit device of the present invention further comprises a comparator for comparing the frequency 45 offset value having been stored in the frequency offset value storage device and the frequency offset value currently detected by the frequency offset detector, and a unit for deciding a change in the frequency offset value based on a comparison result of the comparator, causing the counting period 50 storage device to store a count set value of the timer counter according to a decision result, and changing the duty cycle of the frequency offset detector operated by the operation controller circuit.
The semiconductor circuit device of the present invention 55 further comprises an operation controller circuit for generating a control signal for controlling the update of the frequency offset value, the control signal being generated according to a moving direction and a movement amount decided based on the code of the frequency offset value in the comparison result 60 of the comparator.
With this configuration, a limit is imposed according to a change in the frequency offset value, thereby improving the stability of the system.
The semiconductor circuit device of the present invention 65 further comprises an F detector circuit for deciding the period of the timer counter, and a bit mask circuit for masking the
specific bits of the demodulation baseband signal according to the period decided by the F detector circuit.
With this configuration, the system is intermittently operated arbitrarily or automatically, thereby reducing the power consumption of the system.
As described above, according to the present invention, a frequency offset is accurately detected with a small circuit size and fed back to a threshold value for data decision, thereby accurately performing data decision of the demodulation baseband signal and improving a receiving characteristic.
Further, it is possible to make a correction in the same direction as the center frequency of the filter relative to the cutoff frequency of the filter, thereby improving the receiving characteristic.
Moreover, a correction amount is adjusted by the feedback gain circuit, thereby improving the stability of the system.
Besides, the system is intermittently operated arbitrarily or automatically, thereby reducing the power consumption of the system.
Additionally, a limit is imposed according to a change in the frequency offset value, thereby improving the stability of the system.
As described above, it is possible to prevent the accuracy of detecting a DC offset component on the demodulation baseband signal from being reduced by the presence of noise, prevent an unstable operating state caused by a malfunction resulting from the lower accuracy of detection, and accurately detect and correct a frequency offset component on the demodulation baseband signal.
As a result, a data communication system can attain more stable operations against noise without increasing the power consumption of the overall system, thereby improving the reliability of data communication.
According to the semiconductor circuit device of the present invention, the data communication system can attain more stable operations against noise without increasing the power consumption of the overall system, thereby improving the reliability of data communication. In the field of data communication, the semiconductor circuit device is useful in a communication system using frequency modulation, for example, FSK demodulation. The semiconductor circuit device is particularly useful in the field of radios requiring low cost and low power consumption in a narrow band, and thus industrially applicable.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram showing a schematic configuration of an FSK radio using a semiconductor circuit device according to Embodiment 1 of the present invention;
FIG. 2 is a block diagram showing another schematic configuration of the FSK radio using the semiconductor circuit device according to Embodiment 1;
FIG. 3 is a block diagram showing the configuration of a feedback gain circuit in the semiconductor circuit device according to Embodiment 1;
FIG. 4 is a block diagram showing the schematic configuration of an intermittent operation control section in a semiconductor circuit device according to Embodiment 2 of the present invention;
FIG. 5 is a block diagram showing the configuration of a count monitor circuit in a semiconductor circuit device according to Embodiment 3 of the present invention;
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