Method of converting a series of m-bit information words to a modulated ...

1. A method of converting a series of m-bit information words to a modulated signal, with m being an integer, in which method an n-bit code word is delivered for each received information word, with n being an integer exceeding m, and the delivered code words are converted to the modulated signal, and in which the series of information words is converted to a series of code words according to rules of conversion so that the corresponding modulated signal satisfies a predetermined criterion, wherein the code words are divided into at least one group of code words of a first type and at least one group of code words of a second type, where the delivery of each of the code words belonging to a group of the first type establishes a first type of coding state determined only by the group to which that code word belongs, and the delivery of each of the code words belonging to a group of the second type establishes a second type of coding state determined not only by the group to which that code word belongs but also by information content in the information word itself for which that code word is delivered, each coding state corresponding to a different set of code words into which information words are converted and when one of the code words is assigned to a received information word, that code word is selected from the set of code words that corresponds to the coding state of the first type or the second type established when a preceding code word was delivered, where the sets of code words corresponding to coding states of the second type do not contain any code words in common.

2. A method of converting a series of m-bit information words to a modulated signal, with m being an integer, in which method an n-bit code word is delivered for each received information word, with n being an integer exceeding m, and the delivered code words are converted to the modulated signal, and in which the series of information words is converted to a series of code words according to rules of conversion so that the corresponding modulated signal satisfies a predetermined criterion, wherein the code words are divided among at least one group of a first type and at least one group of a second type, where the delivery of each of the code words belonging to a group of the first type establishes a first type of coding state determined by the group to which that code word belongs, and the delivery of each of the code words belonging to a group of the second type establishes a second type of coding state determined by the group to which that code word belongs and the information word for which that code word is delivered, and when one of the code words is assigned to a received information word, that code word is selected from a set of code words that depends on the coding state of the first type or the second type established when a preceding code word was delivered, where sets of code words belonging to coding states of the second type do not contain any code words in common, wherein the series of information words is converted to the series of code words according to the rules of conversion so that the corresponding modulated signal presents substantially no frequency components in a low-frequency area in the frequency spectrum and each number of successive bit cells having a same signal value in the modulated signal is at least d+1 and at most k+1, and the sets of code words for each of at least a number of information words comprises at least a pair of code words, with low-frequency components in the modulated signal being avoided when the information words are converted by selected code words from the pairs of code words.

3. The method as claimed in claim 2, wherein a running digital sum value is established as a measure for current DC contents, which value is determined over a preceding portion of the modulated signal and denotes for this portion the current value of a difference between the number of bit cells having a first signal value and the number of bit cells having a second signal value, the pairs of code words comprising two code words have opposite effects on the digital sum value, and the code words are selected from the pairs in response to certain digital sum values so that the digital sum value continues to be limited.

4. The method as claimed in claim 2, wherein the modulated signal has bit cells of a first signal value and bit cells of a second signal value, and the series of information words are converted to a series of code words which establish a bit string having bits of a first logical value and bits of a second logical value, in which a number of successive bits having the first logical value and situated among bits having the second logical value is at least d and at most k, and the bit string is converted to the modulated signal, in which transitions from bit cells having the first signal value to bit cells having the second signal value or vice versa correspond to the bits having the second logical value in the bit string.

5. The method as claimed in claim 2, wherein the code words are made up of bits having first and second logic values, and the sets of code words belonging to the coding states of the second type can be mutually distinguished on the basis of the logical values of bits at p predetermined bit positions in the code words, where p is an integer smaller than n.

6. The method as claimed in claim 5, wherein sync words are inserted into the series of code words, the sync words showing bit patterns that cannot occur in a bit string formed by the code words and having different bit patterns, the sync word being used depends on the coding state prior to its insertion, and it establishes a predetermined coding state for the conversion of the next information word to be converted after after its insertion, and the sync words being mutually distinguishable on the basis of the logical values of bits at predetermined bit positions in a manner corresponding to the manner in which the sets of code words belonging to coding states of the second type are mutually distinguishable.

7. The method as claimed in claim 5, wherein p is equal to 2.

8. The method as claimed in claim 2, wherein d is equal to 2, k is equal to 10 and the ratio of n to m is 2:1.

9. The method as claimed in claim 8, wherein m is equal to 8, and n is equal to 16.

10. The method as claimed in claim 7, wherein the code words are made up of bits having a first logic value and bits having a second logic value, a first group of the first type of code words is formed by code words ending in a bits having the first logical value, where a is equal to 0 or 1, a second group of the first type of code words is formed by code words ending in b successive bits having the first logical value, where b is an integer greater than or equal to 6 and smaller than or equal to 9, a group of the second type is formed by code words ending in c successive bits having the first logical value, where c is an integer greater than or equal to 2 and smaller than or equal to 5, and the coding state related sets of code words from which the code words assigned to the information words are selected are formed by code words beginning with a number of bits of the first logical value, which number of bits depends on the coding state related to the set, so that the number of successive bits having the first logical value in a bit string formed by two successive code words is at least equal to d and at most equal to k.

11. A method for manufacturing a record carrier in which a modulated signal is generated by the method as claimed in claim 2 and the record carrier is then provided with an information pattern representing this signal.

12. A coding device, comprising an m-to-n bit converter for converting m-bit information words to n-bit code words, means for converting the n-bit code words to a modulated signal, and state establishing means for establishing a coding state on the delivery of a code word by the converter, the state establishing means being arranged for establishing a first type of coding state for each delivered code word belonging to a group of a first type, which state is determined only by the group to which the delivered code word belongs, and for establishing a second type of coding state for each of the delivered code words belonging to a group of the second type, which state is determined not only by the group to which the delivered code word belongs but also by information content in the information word converted into the delivered code word, wherein the m-to-n bit converter comprises means for selecting a code word corresponding to an information word from a set of code words belonging to the coding state of the first type or the second type established, sets of code words belonging to coding states of the second type containing no code words in common.

13. A coding device, comprising an m-to-n bit converter for converting m-bit information words to n-bit code words, means for converting the n-bit code words to a modulated signal, and state establishing means for establishing a coding state on the delivery of a code word by the converter, the state establishing means being arranged for establishing a first type of coding state for each delivered code word belonging to a group of a first type, which state is determined by the group from which the delivered code word belongs, and for establishing a second type of coding state for each of the delivered code words belonging to a group of the second type, which state is determined by the information word which is to be converted to the delivered code word, wherein the m-to-n bit converter comprises means for selecting a code word corresponding to an information word from a set of code words that depends on the coding state of the first type or the second type established, sets of code words belonging to coding states of the second type containing no code words in common, the device having bit cells and presenting substantially no frequency components in a low-frequency area in the frequency spectrum, wherein each minimum number of successive bit cells having the same signal value is d+1 and each maximum number k+1, the converter further comprises means for generating a pair of code words for each of at least a number of information words, and the device further comprises selecting means for selecting, for the code word delivery, either of the code words from the pairs in accordance with a predetermined criterion related to the low-frequency contents of the modulated signal.

14. The device as claimed in claim 13, further comprising means for determining a running digital sum value, which value denotes for a preceding part of the modulated signal the running value of a difference between the number of bit cells having a first signal value and the number of bit cells having a second signal value, wherein the pairs of code words comprising each at least two code words have opposite effects on the digital sum value, and the selecting means comprises means for selecting, according to a criterion depending on the digital sum value, those code words from the sets for which the digital sum value according to this criterion continues to be limited.

15. The device as claimed in claim 13, wherein the device is arranged for converting the information words to a series of code words which establish a bit string of bits having a first logical value and bits having a second logical value, the minimum number of successive bits having the first logical value located between bits having the second logical value being d and the maximum number being k, and the device further comprises a modulo-2 integrator for converting the bit string to the modulated signal.

16. The device as claimed in claim 13, wherein the sets of code words belonging to the coding states of the second type can be mutually distinguished on the basis of the logical values of bits at p predetermined bit positions in the code words, where p is an integer smaller than or equal to n.

17. The device as claimed in claim 16, further comprising means for inserting sync words into a bit string formed by the code words, the sync words displaying bit patterns that cannot occur in the bit string formed by the code words, means for selecting sync words to be inserted which have different bit patterns in dependence on the determined coding state, the sync words being mutually distinguishable on the basis of the logical values of bits at predetermined bit positions in a manner that corresponds to a manner in which the sets of code words belonging to the coding states of the second type can be mutually distinguished.

18. The device as claimed in claim 17, further comprising means for effecting a predetermined coding state once a sync word has been inserted.

19. The device as claimed in claim 16, wherein p is equal to 2.

20. A record carrier on which the signal as claimed in claim 19 is recorded in a track in which information patterns represent the signal portions, which information patterns comprise first and second parts alternating in the direction of the track, the first parts present detectable properties and the second parts present second properties distinguishable from the first properties, and the parts having the first properties represent bit cells having the first signal property and the parts having the second properties represent the bit cells having the second signal property.

21. The device as claimed in claim 13, wherein d is equal to 2, k is equal to 10, and the ratio of n to m is 2:1.

22. The device as claimed in claim 21, wherein m is equal to 8, and n is equal to 16.

23. The device as claimed in claim 21, wherein the code words are made up of bits having a first logic value and bits having a second logical value, a first group of the first type of code words is formed by code words ending in a bits having the first logical value, where a is equal to 0 or 1, a second group of the first type of code words is formed by code words ending in b successive bits having the first logical value, where b is an integer greater than or equal to 6 and smaller than or equal to 9, a group of the second type is formed by code words ending in c successive bits having the first logical value, where c is an integer greater than or equal to 2 and smaller than or equal to 5, and the coding state related sets of code words from which the code words assigned to the information words are selected are formed by code words beginning with a number of bits of the first logical value, which number of bits depends on the coding state related to the set, so that the number of successive bits having the first logical value in a bit string formed by two successive code words is at least equal to d and at most equal to k.

24. A device for recording information, which device comprises a coding device as claimed in claim 13 for converting a series of information words representing the information to a modulated signal, and means for recording on a record carrier an information pattern corresponding to the signal.

25. A coded signal modulated and stored on a record carrier and representing a series of information words for subsequent reading, demodulation and decoding to reproduce the represented series of information words, said coded signal comprising a sequence of q successive information signal portions which represent q information words, where q is an integer, in which signal each of the information signal portions represents one of the information words and comprises n bit cells, each said bit cell having a first or second signal property, each information signal portion belonging to one of a plurality of predetermined groups of information signal portions, each information signal portion belonging to a first one of said groups of information signal portions uniquely establishing an information word irrespective of information signal portions adjacent to said each information signal portion belonging to said first group, and each information signal portion belonging to a second one of said groups of information signal portions uniquely establishing an information word in dependence upon the value of at least one bit cell in an information signal portion adjacent to said each information signal portion belonging to said second group.

26. The signal as claimed in claim 24, wherein the first or second signal property is a first or second signal value, respectively, each number of successive bit cells having the same signal value is minimum d+1 and maximum k+1, and at any arbitrary point in the signal, the running value of the difference between the number of bit cells having the first signal value and the number of bit cells having the second signal value in the signal portion preceding that point is limited.

27. The signal as claimed in claim 26, wherein n is equal to 16, d is equal to 2, and k is equal to 10.

28. The signal as claimed in claim 25, wherein the signal comprises sync signal portions which have bit cell patterns that do not occur in the sequence of successive information signal portions, where a unique information word is established by each of the information signal portions of the second group combined with either an adjacent sync signal portion or an adjacent information signal portion.

29. The signal as claimed in claim 25, wherein the first or second signal property is a first or second signal value, respectively, and the presence or absence of changes of the signal value between pairs of successive bit cells at p predetermined bit cell transitions in each of the adjacent signal portions in combination with an information signal portion from the second group of information signal portions establish the information word to which that information signal portion corresponds, where p is an integer smaller than n.

30. The signal as claimed in claim 29, wherein p is equal to 2.

31. The signal as claimed in claim 25, wherein the first or second signal property is a first or second signal, respectively, the information signal portions from the predetermined group end in s bit cells having a same signal value, and the information signal portions from the second group end in t bit cells having the same signal value, where s can assume a number of different values, t can assume a number of different values, and s and t are different.

32. The signal as claimed in claim 31, wherein s is greater than or equal to 2, and smaller than or equal to 5.

33. A decoding device for converting the signal as claimed in claim 25 to a series of m-bit information words, the device comprising means for converting the signal to a bit string of bits having a first or second logical value, which bit string contains a series of n-bit code words which correspond to the information signal portions, and converting means for converting the series of code words to the series of information words, an information word being assigned to each of the code words to be converted and in dependence thereon, wherein the converting means are arranged for converting a code word to an information word also in dependence on the logical values of bits in the bit string which are located at p predetermined positions relative to the code word.

34. The decoding device as claimed in claim 33, wherein n is equal to 16, m is equal to 8, and p is equal to 2.

35. The decoding device as claimed in claim 34, wherein the p predetermined bit positions are the first and thirteenth bit position past the end of the code word.

36. The decoding device as claimed in claim 33, further comprising detection means for detecting sync words having bit patterns that cannot be formed by the successive code words in the series, or by a part of the sync word in combination with an adjacent code word.

37. The decoding device as claimed in claim 36, wherein the detection means are arranged for detecting 26-bit sync words corresponding to a bit pattern of "1001000000000100000000001" or to a bit pattern of "00010000000000100000000001", where "0" represents a first logical value and where "1" represents a second logical value.

38. A reading device for reading a record carrier on which information is recorded in an information pattern, the device comprising means for converting the information pattern to a corresponding binary reading signal, and a decoding device as claimed in claim 33 for converting the binary reading signal to a series of m-bit information words.