Remote control system for transmitting messages whose length is adapted to the nature of the operating command and to the quantity of information to be transmitted. Each message is provided with an "anti-phase start bit" in order to prevent a long message from being interpreted as a different, equally valid, shorter message in the case of incomplete reception. |
Citations|
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Referenced by|
| US5952936 | Aug 25, 1997 | Sep 14, 1999 | NEC Corporation | Bidirectional remote control system using interrupt arbitration | | US6848968 | Jan 14, 2002 | Feb 1, 2005 | Mattel, Inc. | Communication system for radio controlled toy vehicle | | US7697605 | Jul 26, 2005 | Apr 13, 2010 | Sony Corporation | Signal transmitting/receiving system and method, signal transmitting apparatus and method, signal processing apparatus and method, recording medium, and program for transmitting/receiving signals unaffected by other apparatuses |
Claims1. A transmitter for use in a remote control system, the transmitter comprising: - generating means for generating a series of message bits constituting a message to be transmitted and a start word preceding the message bits;
- an encoding circuit for converting the message bits into biphase bits having a predetermined bit period which comprises a first and a second bit interval and whose logic value is represented by a pulse during one of the first and second bit intervals; and
- means for transmitting a biphase signal thus obtained to a receiver;
- wherein the encoding circuit converts the start word into a biphase start bit having the pulse during the first interval, said start bit being distinguished from the other biphase bits in that the second bit interval of the biphase start bit is equal to the bit period of the other biphase bits.
2. A transmitter as claimed in claim 1, wherein the generating means generates distinct messages in series of variable lengths and adds a code to the message, said code being indicative of the number of bits comprised by the message. 3. A transmitter as claimed in claim 1, wherein the encoding circuit generates for a predetermined further message bit, a biphase bit of which at least one of the first and second bit intervals is equal to the bit period of the other biphase bits. 4. A transmitter as claimed in claim 2, wherein the encoding circuit generates for a predetermined further message bit, a biphase bit of which at least one of the first and second bit intervals is equal to the bit period of the other biphase bits. 5. A receiver for use in a remote control system for receiving signals consisting of encoded message bits preceded by a start word, in which each bit of the message has been converted into a biphase bit having a predetermined bit period which comprises a first and a second bit interval and whose logic value is represented by a pulse during one of the first and second bit intervals, and in which the start word has been converted into a biphase start bit having the pulse in the first bit interval, said biphase start bit being distinguished from other biphase bits in that the second bit interval of the biphase start bit is equal to the bit period of the other biphase bits, said receiver comprising: - means for receiving the transmitted biphase signal; and
- a decoding circuit for decoding the biphase start bit, starting in response thereto a periodic reference signal whose period corresponds to the predetermined bit period, and for regaining the original message, wherein said decoding circuit ignores the message if no biphase bit is received during a period of the periodic reference signal after decoding the biphase start bit.
6. A receiver as claimed in claim 5, in which the messages are encoded in a series of variable length and a code indicative of the number of bits in the message has been added to the message, wherein said decoding circuit decodes said code and ignores the message if the number of bits in the message does not correspond to said code. 7. A receiver as claimed in claim 6, in which said transmitted biphase signal includes, for a predetermined further message bit, a further biphase bit of which at least one of the first and second bit intervals is equal to the bit period of the other biphase bits, wherein said decoding circuit decodes the further biphase bit and ignores the message if the further biphase bit is not received. 8. A remote control system comprising a transmitter and a receiver, the transmitter comprising: - generating means for generating a series of message bits constituting a message to be transmitted, and a start word preceding the message bits;
- an encoding circuit for converting each message bit into a biphase bit having a predetermined bit period which comprises a first and a second bit interval and whose logic value is represented by a pulse during one of the first and second bit intervals; and
- means for transmitting a biphase signal thus obtained to the receiver; and the receiver comprising:
- means for receiving the transmitted biphase signal; and
- a decoding circuit for decoding the start word, starting in response thereto a periodic reference signal whose period corresponds to the predetermined bit period, and for regaining the original message, wherein the encoding circuit converts the start word into a biphase start bit having the pulse in the first bit interval, said biphase start bit being distinguished from the other biphase bits in that the second bit interval of the biphase start bit is equal to the bit period of the other biphase bits, and the decoding circuit decodes said biphase start bit and ignores the message if no biphase bit is received during a period of the periodic reference signal after decoding the biphase start bit thereby regaining the original message.
9. A receiver as claimed in claim 5, in which said transmitted biphase signal includes, for a predetermined further message bit, a further biphase bit of which at least one of the first and second bit intervals is equal to the bit period of the other biphase bits, wherein said decoding circuit decodes the further biphase bit and ignores the message if the further biphase bit is not received. |
