| About 1,070 results  | www.google.com/patents/WO1999031732A3?cl=en A method of forming a transistor gate includes forming a gate oxide layer over a
semiconductive substrate. Chlorine is provided within the gate ... |
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 | www.google.com/patents/WO2012164437A3?cl=en | A support substrate including a body (35) and a plurality of ... |
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 | www.google.com/patents/WO2006028715A3?cl=en A method of selectively plating nickel on an intermediate semiconductor device
structure. The method comprises providing an intermediate ... |
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 | www.google.com/patents/WO2014207590A3?cl=en A technique is disclosed for causing the top surfaces of solder bumps on a chip (
40) to be in the same plane to ensure a more reliable bond ... |
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 | www.google.com/patents/WO2004001846A3?cl=en A method of reducing parasitic capacitance in an integrated circuit having three
or more metal levels (M1, M2, M3, etc) is described. |
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 | www.google.com/patents/USD394844 FIG. 1 is an enlarged top perspective view of a temporary package for
semiconductor dice showing my new design;. FIG. 2 is a left side elevational view
thereof;. |
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 | www.google.com/patents/USD402638 FIG. 1 is an enlarged top perspective view of a temporary package for
semiconductor dice showing our new design;. FIG. 2 is a left side elevational
view thereof;. |
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 | www.google.com/patents/US6696109 A process for depositing titanium silicide films via chemical vapor deposition
takes place in a deposition chamber that has been evacuated to ... |
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 | www.google.com/patents/US6495400 An embodiment of an inventive semiconductor device comprises an unpackaged
semiconductor wafer section having a major surface with a ... |
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 | www.google.com/patents/US7082033 A cover, acting as a heat sink for integrated circuit devices, encloses one or more
devices mounted on a support structure. The thermally ... |
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